[Intel-gfx] [PATCH] drm/i915: Use common RPS scheme for Cherryview

[Chris Wilson]

Cherryview uses a custom static definition of its RPS parameters (for
automatically driving GPU frequency selection) - yet still couples into
the waitboosting scheme of the common RPS setup.

The rationale given in commit 8fb55197e64d ("drm/i915: Agressive
downclocking on Baytrail") was that Cherryview might have to take the
common powerwell (unlike Baytrail it has multiple powerwells) to read the
RPS registers more often. However, we have reports that the current values
are not working well for kodi (the frequency stays too low). Lets use the
common values and see if we can tune them appropriately to benefit
everyone.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: fritsch at kodi.tv
Cc: Deepak S <deepak.s at linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/intel_pm.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 20794804f3bb..a140fe075e1b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4837,8 +4837,7 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)
 
 	if (val != dev_priv->rps.cur_freq) {
 		vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
-		if (!IS_CHERRYVIEW(dev_priv))
-			gen6_set_rps_thresholds(dev_priv, val);
+		gen6_set_rps_thresholds(dev_priv, val);
 	}
 
 	dev_priv->rps.cur_freq = val;
-- 
2.8.1