[Intel-gfx] [PATCH v3 07/21] drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition

Rodrigo Vivi rodrigo.vivi at gmail.com
Mon Aug 15 20:21:24 UTC 2016


On Tue, Aug 09, 2016 at 11:45:13AM -0700, Carlos Santa wrote:
> Moving all GPU features to the platform struct definition allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct
> 	  definitions
> 
> Signed-off-by: Carlos Santa <carlos.santa at intel.com>

This is one of those patches where only reading the patch it looks like
the definition went to the wrong place, but looking to the final results
it is possible to see that has_resource_streamer went to the correct
platforms.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h | 4 ++--
>  drivers/gpu/drm/i915/i915_pci.c | 3 +++
>  2 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 14e8911..e9d95c5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -773,6 +773,7 @@ struct intel_csr {
>  	func(has_psr) sep \
>  	func(has_runtime_pm) sep \
>  	func(has_csr) sep \
> +	func(has_resource_streamer) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2786,8 +2787,7 @@ struct drm_i915_cmd_table {
>  #define HAS_GUC_UCODE(dev)	(HAS_GUC(dev))
>  #define HAS_GUC_SCHED(dev)	(HAS_GUC(dev))
>  
> -#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
> -				    INTEL_INFO(dev)->gen >= 8)
> +#define HAS_RESOURCE_STREAMER(dev) (INTEL_INFO(dev)->has_resource_streamer)
>  
>  #define HAS_POOLED_EU(dev)	(INTEL_INFO(dev)->has_pooled_eu)
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 21a3bc5..46c48ed 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -260,6 +260,7 @@ static const struct intel_device_info intel_valleyview_info = {
>  	.has_ddi = 1, \
>  	.has_fpga_dbg = 1, \
>  	.has_psr = 1, \
> +	.has_resource_streamer = 1, \
>  	.has_runtime_pm = 1
>  
>  static const struct intel_device_info intel_haswell_info = {
> @@ -291,6 +292,7 @@ static const struct intel_device_info intel_cherryview_info = {
>  	.is_cherryview = 1,
>  	.has_psr = 1,
>  	.has_runtime_pm = 1,
> +	.has_resource_streamer = 1,
>  	.display_mmio_offset = VLV_DISPLAY_BASE,
>  	GEN_CHV_PIPEOFFSETS,
>  	CURSOR_OFFSETS,
> @@ -324,6 +326,7 @@ static const struct intel_device_info intel_broxton_info = {
>  	.has_runtime_pm = 1,
>  	.has_pooled_eu = 0,
>  	.has_csr = 1,
> +	.has_resource_streamer = 1,
>  	GEN_DEFAULT_PIPEOFFSETS,
>  	IVB_CURSOR_OFFSETS,
>  	BDW_COLORS,
> -- 
> 1.9.1
> 
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