[Intel-gfx] [PATCH v3 21/21] drm/i915: Move HAS_GUC definition to platform definition

[Rodrigo Vivi]

On Tue, Aug 09, 2016 at 11:45:27AM -0700, Carlos Santa wrote:
> Moving all GPU features to the platform definition allows for
> 	- standard place when adding new features from new platform
> 	- possible to see supported features when dumping struct
>           definitions
> 


Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> Signed-off-by: Carlos Santa <carlos.santa at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8e0e0fa..497854e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -782,6 +782,7 @@ struct intel_csr {
>  	func(has_logical_ring_contexts) sep \
>  	func(has_l3_dpf) sep \
>  	func(has_gmch_display) sep \
> +	func(has_guc) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2790,7 +2791,7 @@ struct drm_i915_cmd_table {
>   * command submission once loaded. But these are logically independent
>   * properties, so we have separate macros to test them.
>   */
> -#define HAS_GUC(dev)		(IS_GEN9(dev))
> +#define HAS_GUC(dev)		(INTEL_INFO(dev)->has_guc)
>  #define HAS_GUC_UCODE(dev)	(HAS_GUC(dev))
>  #define HAS_GUC_SCHED(dev)	(HAS_GUC(dev))
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index c5f4078..02a7619 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -331,6 +331,7 @@ static const struct intel_device_info intel_skylake_info = {
>  	.is_skylake = 1,
>  	.gen = 9,
>  	.has_csr = 1,
> +	.has_guc = 1,
>  };
>  
>  static const struct intel_device_info intel_skylake_gt3_info = {
> @@ -338,6 +339,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
>  	.is_skylake = 1,
>  	.gen = 9,
>  	.has_csr = 1,
> +	.has_guc = 1,
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
>  };
>  
> @@ -359,6 +361,7 @@ static const struct intel_device_info intel_broxton_info = {
>  	.has_gmbus_irq = 1,
>  	.has_hw_contexts = 1,
>  	.has_logical_ring_contexts = 1,
> +	.has_guc = 1,
>  	GEN_DEFAULT_PIPEOFFSETS,
>  	IVB_CURSOR_OFFSETS,
>  	BDW_COLORS,
> @@ -369,6 +372,7 @@ static const struct intel_device_info intel_kabylake_info = {
>  	.is_kabylake = 1,
>  	.gen = 9,
>  	.has_csr = 1,
> +	.has_guc = 1,
>  };
>  
>  static const struct intel_device_info intel_kabylake_gt3_info = {
> @@ -376,6 +380,7 @@ static const struct intel_device_info intel_kabylake_gt3_info = {
>  	.is_kabylake = 1,
>  	.gen = 9,
>  	.has_csr = 1,
> +	.has_guc = 1,
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
>  };
>  
> -- 
> 1.9.1
> 
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