[Intel-gfx] [PATCH 9/9] drm/i915: Enable upfront link training support for HSW/BDW

[R, Durgadoss]

> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Manasi Navare
> Sent: Wednesday, August 10, 2016 12:59 AM
> To: intel-gfx at lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 9/9] drm/i915: Enable upfront link training
> support for HSW/BDW
> 
> Get the PLLs for HSW/BDW using the platform specific function
> and add hooks for enabling upfront link training on HSW and BDW.
> 
> Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>

Reviewed-by: Durgadoss R <durgadoss.r at intel.com>

Thanks,
Durga

> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 2 ++
>  drivers/gpu/drm/i915/intel_dp.c  | 4 +++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index ed9ebca..fd0c538 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2410,6 +2410,8 @@ intel_ddi_get_link_dpll(struct intel_dp *intel_dp,
> int clock)
>  		}
>  	} else if (IS_SKYLAKE(dev_priv)) {
>  		pll = skl_find_link_pll(dev_priv, clock);
> +	} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> +		pll = hsw_ddi_dp_get_dpll(encoder, clock);
>  	}
>  	return pll;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 572119e..25190fa 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -5762,8 +5762,10 @@ intel_dp_init_connector(struct intel_digital_port
> *intel_dig_port,
> 
>  	/* Initialize upfront link training vfunc for DP */
>  	if (intel_encoder->type != INTEL_OUTPUT_EDP) {
> -		if (IS_BROXTON(dev) || IS_SKYLAKE(dev))
> +		if (IS_BROXTON(dev) || IS_SKYLAKE(dev) ||
> +		    IS_BROADWELL(dev) || IS_HASWELL(dev))
>  			intel_dp->upfront_link_train =
> intel_ddi_upfront_link_train;
> +
>  	}
> 
>  	/* eDP only on port B and/or C on vlv/chv */
> --
> 1.9.1
> 
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