[Intel-gfx] [PATCH v2] drm/i915/dp: Switch to using the DRM function for reading DP link status

[Dhinakaran Pandiyan]

Since a DRM function that reads link DP link status is available, let's
use that instead of the i915 clone.

drm_dp_dpcd_read_link_status() returns a negative error code if the number
of bytes read is not DP_LINK_STATUS_SIZE, drm_dp_dpcd_access() does the
length check.

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>

v2: Eliminated redundant DP_LINK_STATUS_SIZE length check.
---
 drivers/gpu/drm/i915/intel_dp.c               | 15 ++-------------
 drivers/gpu/drm/i915/intel_dp_link_training.c |  8 ++++++--
 drivers/gpu/drm/i915/intel_drv.h              |  2 --
 3 files changed, 8 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8fe2afa..8eff57e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2863,17 +2863,6 @@ static void chv_dp_post_pll_disable(struct intel_encoder *encoder)
 	chv_phy_post_pll_disable(encoder);
 }
 
-/*
- * Fetch AUX CH registers 0x202 - 0x207 which contain
- * link status information
- */
-bool
-intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE])
-{
-	return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status,
-				DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE;
-}
-
 /* These are source-specific values. */
 uint8_t
 intel_dp_voltage_max(struct intel_dp *intel_dp)
@@ -3896,8 +3885,8 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
 
 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
 
-	if (!intel_dp_get_link_status(intel_dp, link_status)) {
-		DRM_ERROR("Failed to get link status\n");
+	if (drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status) <= 0) {
+		DRM_ERROR("failed to get link status\n");
 		return;
 	}
 
diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c
index 60fb39c..8e60e7c 100644
--- a/drivers/gpu/drm/i915/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/intel_dp_link_training.c
@@ -150,7 +150,9 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp)
 		uint8_t link_status[DP_LINK_STATUS_SIZE];
 
 		drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
-		if (!intel_dp_get_link_status(intel_dp, link_status)) {
+
+		if (drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status)
+						 <= 0) {
 			DRM_ERROR("failed to get link status\n");
 			break;
 		}
@@ -258,7 +260,9 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
 		}
 
 		drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
-		if (!intel_dp_get_link_status(intel_dp, link_status)) {
+
+		if (drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status)
+						 <= 0) {
 			DRM_ERROR("failed to get link status\n");
 			break;
 		}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b1fc67e..a3a2cb9 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1394,8 +1394,6 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing);
 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
 			   uint8_t *link_bw, uint8_t *rate_select);
 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
-bool
-intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]);
 
 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
 {
-- 
2.5.0