[Intel-gfx] [PATCH v4 11/22] drm/i915: Move HAS_DP_MST definition to platform definition
Carlos Santa
carlos.santa at intel.com
Wed Aug 17 19:30:46 UTC 2016
Moving all GPU features to the platform struct definition allows for
- standard place when adding new features from new platforms
- possible to see supported features when dumping struct
definitions
Signed-off-by: Carlos Santa <carlos.santa at intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_pci.c | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f20a3e3..a41ecce 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -652,6 +652,7 @@ struct intel_csr {
func(has_resource_streamer) sep \
func(has_rc6) sep \
func(has_rc6p) sep \
+ func(has_dp_mst) sep \
func(has_pipe_cxsr) sep \
func(has_hotplug) sep \
func(cursor_needs_physical) sep \
@@ -2781,8 +2782,7 @@ struct drm_i915_cmd_table {
#define HAS_IPS(dev) (IS_HSW_ULT(dev) || IS_BROADWELL(dev))
-#define HAS_DP_MST(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
- INTEL_INFO(dev)->gen >= 9)
+#define HAS_DP_MST(dev) (INTEL_INFO(dev)->has_dp_mst)
#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c6a5bd0..da2ec6f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -266,6 +266,7 @@ static const struct intel_device_info intel_valleyview_info = {
.has_fpga_dbg = 1, \
.has_psr = 1, \
.has_resource_streamer = 1, \
+ .has_dp_mst = 1, \
.has_rc6p = 0 /* RC6p removed-by HSW */, \
.has_runtime_pm = 1
@@ -335,6 +336,7 @@ static const struct intel_device_info intel_broxton_info = {
.has_csr = 1,
.has_resource_streamer = 1,
.has_rc6 = 1,
+ .has_dp_mst = 1,
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
BDW_COLORS,
--
1.9.1
More information about the Intel-gfx
mailing list