[Intel-gfx] drm/i915/slpc: Add slpc support for max/min freq
kbuild test robot
lkp at intel.com
Mon Aug 22 07:47:41 UTC 2016
Hi Tom,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.8-rc3 next-20160819]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]
url: https://github.com/0day-ci/linux/commits/Sagar-Arun-Kamble/drm-i915-slpc-Add-slpc-support-for-max-min-freq/20160821-143422
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-rhel (attached as .config)
compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_sysfs.c: In function 'gt_max_freq_mhz_store':
>> drivers/gpu/drm/i915/i915_sysfs.c:385:6: error: implicit declaration of function 'intel_slpc_active' [-Werror=implicit-function-declaration]
if (intel_slpc_active(dev_priv)) {
^~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_sysfs.c:386:3: error: implicit declaration of function 'intel_slpc_set_param' [-Werror=implicit-function-declaration]
intel_slpc_set_param(dev_priv,
^~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_sysfs.c:387:10: error: 'SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_sysfs.c:387:10: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/gpu/drm/i915/i915_sysfs.c:390:10: error: 'SLPC_PARAM_GLOBAL_MAX_GT_SLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MAX_GT_SLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_sysfs.c: In function 'gt_min_freq_mhz_store':
>> drivers/gpu/drm/i915/i915_sysfs.c:460:10: error: 'SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_sysfs.c:463:10: error: 'SLPC_PARAM_GLOBAL_MIN_GT_SLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MIN_GT_SLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
--
drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_max_freq_set':
>> drivers/gpu/drm/i915/i915_debugfs.c:5004:6: error: implicit declaration of function 'intel_slpc_active' [-Werror=implicit-function-declaration]
if (intel_slpc_active(dev_priv)) {
^~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_debugfs.c:5005:3: error: implicit declaration of function 'intel_slpc_set_param' [-Werror=implicit-function-declaration]
intel_slpc_set_param(dev_priv,
^~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_debugfs.c:5006:10: error: 'SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_debugfs.c:5006:10: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/gpu/drm/i915/i915_debugfs.c:5009:10: error: 'SLPC_PARAM_GLOBAL_MAX_GT_SLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MAX_GT_SLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_min_freq_set':
>> drivers/gpu/drm/i915/i915_debugfs.c:5082:10: error: 'SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_debugfs.c:5085:10: error: 'SLPC_PARAM_GLOBAL_MIN_GT_SLICE_FREQ_MHZ' undeclared (first use in this function)
SLPC_PARAM_GLOBAL_MIN_GT_SLICE_FREQ_MHZ,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +/intel_slpc_active +385 drivers/gpu/drm/i915/i915_sysfs.c
379 if (val > dev_priv->rps.rp0_freq)
380 DRM_DEBUG("User requested overclocking to %d\n",
381 intel_gpu_freq(dev_priv, val));
382
383 dev_priv->rps.max_freq_softlimit = val;
384
> 385 if (intel_slpc_active(dev_priv)) {
> 386 intel_slpc_set_param(dev_priv,
> 387 SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
388 (u32) intel_gpu_freq(dev_priv, val));
389 intel_slpc_set_param(dev_priv,
> 390 SLPC_PARAM_GLOBAL_MAX_GT_SLICE_FREQ_MHZ,
391 (u32) intel_gpu_freq(dev_priv, val));
392 }
393
394 val = clamp_t(int, dev_priv->rps.cur_freq,
395 dev_priv->rps.min_freq_softlimit,
396 dev_priv->rps.max_freq_softlimit);
397
398 /* We still need *_set_rps to process the new max_delay and
399 * update the interrupt limits and PMINTRMSK even though
400 * frequency request may be unchanged. */
401 intel_set_rps(dev_priv, val);
402
403 mutex_unlock(&dev_priv->rps.hw_lock);
404
405 intel_runtime_pm_put(dev_priv);
406
407 return count;
408 }
409
410 static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
411 {
412 struct drm_minor *minor = dev_to_drm_minor(kdev);
413 struct drm_device *dev = minor->dev;
414 struct drm_i915_private *dev_priv = to_i915(dev);
415 int ret;
416
417 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
418
419 mutex_lock(&dev_priv->rps.hw_lock);
420 ret = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
421 mutex_unlock(&dev_priv->rps.hw_lock);
422
423 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
424 }
425
426 static ssize_t gt_min_freq_mhz_store(struct device *kdev,
427 struct device_attribute *attr,
428 const char *buf, size_t count)
429 {
430 struct drm_minor *minor = dev_to_drm_minor(kdev);
431 struct drm_device *dev = minor->dev;
432 struct drm_i915_private *dev_priv = to_i915(dev);
433 u32 val;
434 ssize_t ret;
435
436 ret = kstrtou32(buf, 0, &val);
437 if (ret)
438 return ret;
439
440 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
441
442 intel_runtime_pm_get(dev_priv);
443
444 mutex_lock(&dev_priv->rps.hw_lock);
445
446 val = intel_freq_opcode(dev_priv, val);
447
448 if (val < dev_priv->rps.min_freq ||
449 val > dev_priv->rps.max_freq ||
450 val > dev_priv->rps.max_freq_softlimit) {
451 mutex_unlock(&dev_priv->rps.hw_lock);
452 intel_runtime_pm_put(dev_priv);
453 return -EINVAL;
454 }
455
456 dev_priv->rps.min_freq_softlimit = val;
457
458 if (intel_slpc_active(dev_priv)) {
459 intel_slpc_set_param(dev_priv,
> 460 SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ,
461 (u32) intel_gpu_freq(dev_priv, val));
462 intel_slpc_set_param(dev_priv,
> 463 SLPC_PARAM_GLOBAL_MIN_GT_SLICE_FREQ_MHZ,
464 (u32) intel_gpu_freq(dev_priv, val));
465 }
466
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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