[Intel-gfx] [PATCH 2/7] drm/i915: Add pipe_src size property calculations in atomic path.

[Nabendu Maiti]

Adding pipe source size property calculations on atomic path to
dynamically change pipe source size.

Write desired values to change the size. Write 0 to disable pipe scaler
and restore the original mode adjusted values.

Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 69 ++++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h     |  1 +
 2 files changed, 67 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e4e6141..ff5dea8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12548,6 +12548,55 @@ static bool check_single_encoder_cloning(struct drm_atomic_state *state,
 	return true;
 }
 
+static int skylake_pfiter_calculate(struct drm_crtc *crtc,
+				   struct drm_crtc_state *crtc_state)
+{
+	struct drm_device *dev = crtc->dev;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_crtc_state *pipe_config =
+		to_intel_crtc_state(crtc_state);
+	bool mode_changed = needs_modeset(crtc_state);
+	struct intel_connector *intel_connector;
+	int ret = 0;
+	struct drm_display_mode *adjusted_mode =
+		&intel_crtc->config->base.adjusted_mode;
+
+	for_each_intel_connector(dev, intel_connector) {
+		if (!(intel_connector) || !(intel_connector->encoder) ||
+		    (intel_connector->encoder->base.crtc  != crtc))
+			continue;
+
+		if (((pipe_config->pipe_src_w !=
+		      intel_crtc->config->pipe_src_w) ||
+		     (pipe_config->pipe_src_h !=
+		      intel_crtc->config->pipe_src_h)) && (!mode_changed))
+			pipe_config->update_pipe = true;
+
+		if ((pipe_config->pipe_scaling_mode !=
+		    intel_connector->panel.fitting_mode) &&
+		    (!mode_changed)) {
+			if  ((adjusted_mode->hdisplay !=
+			      pipe_config->pipe_src_w) ||
+			     (adjusted_mode->vdisplay !=
+			      pipe_config->pipe_src_h)) {
+				pipe_config->pipe_scaling_mode =
+					intel_connector->panel.fitting_mode;
+				pipe_config->update_pipe = true;
+			}
+		}
+
+		if ((mode_changed) || (pipe_config->update_pipe)) {
+			ret = skl_update_scaler_crtc(pipe_config);
+			if (ret)
+				break;
+			intel_pch_panel_fitting(intel_crtc, pipe_config,
+					intel_connector->panel.fitting_mode);
+			break;
+		}
+	}
+	return ret;
+}
+
 static int intel_crtc_atomic_check(struct drm_crtc *crtc,
 				   struct drm_crtc_state *crtc_state)
 {
@@ -12616,9 +12665,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
 	}
 
 	if (INTEL_INFO(dev)->gen >= 9) {
-		if (mode_changed)
-			ret = skl_update_scaler_crtc(pipe_config);
-
+		ret = skylake_pfiter_calculate(crtc, crtc_state);
 		if (!ret)
 			ret = intel_atomic_setup_scalers(dev, intel_crtc,
 							 pipe_config);
@@ -13995,6 +14042,21 @@ static int intel_atomic_check(struct drm_device *dev,
 		struct intel_crtc_state *pipe_config =
 			to_intel_crtc_state(crtc_state);
 
+		if (crtc_state->pipescaler_changed) {
+			if (crtc_state->src_w == 0 && crtc_state->src_h == 0) {
+				struct intel_crtc *intel_crtc =
+					to_intel_crtc(crtc);
+				struct drm_display_mode *adjusted_mode =
+					&intel_crtc->config->base.adjusted_mode;
+
+				crtc_state->src_w = adjusted_mode->hdisplay;
+				crtc_state->src_h = adjusted_mode->vdisplay;
+			}
+			pipe_config->pipe_src_w = crtc_state->src_w;
+			pipe_config->pipe_src_h = crtc_state->src_h;
+			crtc_state->pipescaler_changed = false;
+		}
+
 		/* Catch I915_MODE_FLAG_INHERITED */
 		if (crtc_state->mode.private_flags != crtc->state->mode.private_flags)
 			crtc_state->mode_changed = true;
@@ -14988,6 +15050,7 @@ fail:
 	return NULL;
 }
 
+
 void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *plane)
 {
 	if (!dev->mode_config.rotation_property) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 570a7ca..189856c 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -532,6 +532,7 @@ struct intel_crtc_state {
 	 * All planes will be positioned inside this space,
 	 * and get clipped at the edges. */
 	int pipe_src_w, pipe_src_h;
+	u32 pipe_scaling_mode;
 
 	/* Whether to set up the PCH/FDI. Note that we never allow sharing
 	 * between pch encoders and cpu encoders. */
-- 
1.9.1