[Intel-gfx] [PATCH 00/15] drm/i915: VLV/CHV atomic wm prep work

[Ville Syrjälä]

On Mon, Nov 28, 2016 at 07:37:02PM +0200, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> A decent pile of prep work split off from my VLV/CHV atomic watermark
> work. Mostly VLV/CHV specific stuff, but there are a few small things
> in there that touch other platforms as well.
> 
> Entire series available here:
> git://github.com/vsyrjala/linux.git vlv_atomic_wm_prep
> 
> Ville Syrjälä (15):
>   drm/i915: Drop the nop intel_update_watermarks() call from
>     haswell_crtc_enable()
>   drm/i915: Use the ilk_disable_lp_wm() return value
>   drm/i915: Fix the level 0 max_wm hack on VLV/CHV
>   drm/i915: Clean up VLV/CHV maxfifo watermark setup
>   drm/i915: Remove duplicated wm setup for vlv and chv
>   drm/i915: Organize vlv/chv watermarks by plane_id
>   drm/i915: Introduce vlv_invert_wm_value()
>   drm/i915: Pass around dev_priv in vlv wm functions
>   drm/i915: Protect cxsr state with wm_mutex
>   drm/i915: Skip vblank wait if cxsr was already off
>   drm/i915: Zero out HOWM registers before writing new WM/HOWM register
>     values
>   drm/i915: Write all DDL registers in one go
>   drm/i915: Clean up vlv_program_watermarks()
>   drm/i915: Pass crtc state to vlv_compute_wm_level()

Pushed all of the above to dinq. Thanks for the reviews.

>   drm/i915: Protect DSPARB registers with a spinlock

Sent out a v2 of this one, with an amended commit msg.

> 
>  drivers/gpu/drm/i915/i915_drv.c      |   1 +
>  drivers/gpu/drm/i915/i915_drv.h      |  21 +-
>  drivers/gpu/drm/i915/intel_display.c |  21 +-
>  drivers/gpu/drm/i915/intel_pm.c      | 394 ++++++++++++++++++-----------------
>  4 files changed, 218 insertions(+), 219 deletions(-)
> 
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel OTC