[Intel-gfx] ✓ Fi.CI.BAT: success for GLK MIPI DSI VIDEO MODE PATCHES (rev2)

[Patchwork]

== Series Details ==

Series: GLK MIPI DSI VIDEO MODE PATCHES (rev2)
URL   : https://patchwork.freedesktop.org/series/16542/
State : success

== Summary ==

Series 16542v2 GLK MIPI DSI VIDEO MODE PATCHES
https://patchwork.freedesktop.org/api/1.0/series/16542/revisions/2/mbox/


fi-bdw-5557u     total:247  pass:233  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:247  pass:208  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-t5700     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-j1900     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-ilk-650       total:247  pass:195  dwarn:0   dfail:0   fail:0   skip:52 
fi-ivb-3520m     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:247  pass:227  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:247  pass:224  dwarn:3   dfail:0   fail:0   skip:20 
fi-skl-6770hq    total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-snb-2600      total:247  pass:215  dwarn:0   dfail:0   fail:0   skip:32 

c8109e51ef622698a43d4e8382a5f7fbbae6375b drm-tip: 2016y-12m-15d-07h-22m-49s UTC integration manifest
6295a9c drm/915: Parsing the missed out DTD fields from the VBT
1fb6cbb drm/i915/glk: Program dphy param reg for GLK
41cad10 drm/i915/glk: Program txesc clock divider for GLK
7672118 drm/i915i/glk: Program MIPI_CLOCK_CTRL only for BXT
afff049 drm/i915/glk: Add DSI PLL divider range for glk
140ad28 drm/i915: Set the Z inversion overlap field
120cc17 drm/i915/glk: Add MIPIIO Enable/disable sequence
c2c81ac drm/i915/glk: Program new MIPI DSI PHY registers for GLK
5874254 drm/i915/glk: Add new bit fields in MIPI CTRL register

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3292/