[Intel-gfx] [PATCH 8/8] drm/i915/get_params: Add HuC status to getparams
Chris Wilson
chris at chris-wilson.co.uk
Thu Dec 15 22:42:53 UTC 2016
On Thu, Dec 15, 2016 at 02:29:50PM -0800, anushasr wrote:
> From: Peter Antoine <peter.antoine at intel.com>
>
> This patch will allow for getparams to return the status of the HuC.
> As the HuC has to be validated by the GuC this patch uses the validated
> status to show when the HuC is loaded and ready for use. You cannot use
> the loaded status as with the GuC as the HuC is verified after it is
> loaded and is not usable until it is verified.
>
> v2: removed the forewakes as the registers are already force-woken.
> (T.Ursulin)
> v4: rebased.
> v5: rebased on top of drm-tip.
> v6: rebased. Removed any reference to intel_huc.h
> v7: rebased. Rename I915_PARAM_HAS_HUC to I915_PARAM_HUC_STATUS.
> Remove intel_is_huc_valid() since it is used only in one place.
> Put the case of I915_PARAM_HAS_HUC() in the right place.
>
> Signed-off-by: Peter Antoine <peter.antoine at intel.com>
> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++++
> drivers/gpu/drm/i915/intel_huc_loader.c | 1 -
> include/uapi/drm/i915_drm.h | 1 +
> 3 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 85a47c2..0bc016d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -49,6 +49,7 @@
> #include "i915_trace.h"
> #include "i915_vgpu.h"
> #include "intel_drv.h"
> +#include "intel_uc.h"
>
> static struct drm_driver driver;
>
> @@ -315,6 +316,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
> case I915_PARAM_MIN_EU_IN_POOL:
> value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool;
> break;
> + case I915_PARAM_HUC_STATUS:
> + value = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
Same question as last time: does the device need to be awake? We know is
one of the GT power wells, so presumably we need an rpm_get/rpm_put as
well to access the register.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
More information about the Intel-gfx
mailing list