[Intel-gfx] [PATCH 2/2] drm/i915: Dump more configuration information for DSI
Chris Wilson
chris at chris-wilson.co.uk
Fri Dec 16 17:37:58 UTC 2016
On Wed, Dec 14, 2016 at 07:14:05PM +0200, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Dump out more of the DSI configuration details during init.
> This includes pclk, burst_mode_ratio, lane_count, pixel_overlap,
> video_mode_format and reset_timer_val.
>
> v2: Dump more info (Chris)
dphy_reg? No idea what it is, just another one I couldn't find printed.
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 3fd3bac5fccc..d2e3aa9c5022 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -808,6 +808,15 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> 8);
> intel_dsi->clk_hs_to_lp_count += extra_byte_count;
>
> + DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
> + DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
> + DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
> + DRM_DEBUG_KMS("Video mode format %s\n",
> + intel_dsi->video_mode_format == NON_BURST_SYNC_PULSE ? "non-burst with sync pulse" :
> + intel_dsi->video_mode_format == NON_BURST_SYNC_EVENTS ? "non-burst with sync events" :
> + intel_dsi->video_mode_format == BURST_MODE ? "burst" : "<unknown>");
Argh. The mipi_config.video_transfer_mode:2 has
#define NON_BURST_SYNC_PULSE 0x1
#define NON_BURST_SYNC_EVENTS 0x2
#define BURST_MODE 0x3
but intel_dist.video_mode_format is
#define VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE (1 << 0)
#define VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS (2 << 0)
#define VIDEO_MODE_BURST (3 << 0)
They match just usage is consistent.
However you want to resolve that,
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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