[Intel-gfx] [PATCH 6/9] drm/i915/tdr: Add engine reset count to error state
Michel Thierry
michel.thierry at intel.com
Mon Dec 19 18:09:15 UTC 2016
On 19/12/16 00:27, Tvrtko Ursulin wrote:
>
> On 16/12/2016 20:20, Michel Thierry wrote:
>> From: Arun Siluvery <arun.siluvery at linux.intel.com>
>> @@ -937,6 +937,7 @@ struct drm_i915_error_state {
>> enum intel_engine_hangcheck_action hangcheck_action;
>> struct i915_address_space *vm;
>> int num_requests;
>> + u32 reset_count;
>>
>> /* position of active request inside the ring */
>> u32 rq_head, rq_post, rq_tail;
>> @@ -1629,6 +1630,8 @@ struct i915_gpu_error {
>> #define I915_RESET_IN_PROGRESS 0
>> #define I915_WEDGED (BITS_PER_LONG - 1)
>>
>> + unsigned long engine_reset_count[I915_NUM_ENGINES];
>> +
>> /**
>> * Waitqueue to signal when a hang is detected. Used to for waiters
>> * to release the struct_mutex for the reset to procede.
>> @@ -3397,6 +3400,12 @@ static inline u32 i915_reset_count(struct
>> i915_gpu_error *error)
>> return READ_ONCE(error->reset_count);
>> }
>>
>> +static inline u32 i915_engine_reset_count(struct i915_gpu_error *error,
>> + struct intel_engine_cs *engine)
>> +{
>> + return READ_ONCE(error->engine_reset_count[engine->id]);
>> +}
>
> Accidentally spotted a type width mismatch here between u32 and unsigned
> long. Not sure which one would be best, maybe unsigned int?
>
> Regards,
>
Thanks, I'll change engine_reset_count to u32... I don't think we
should worry too much if it overflows.
> Tvrtko
>
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