[Intel-gfx] [PATCH] drm/i915/guc: Reserve the upper end of the Global GTT for the GuC

[Chris Wilson]

The GuC would like to own the upper portion of the GTT for itself, so
exclude it from our drm_mm to prevent us using it.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler at intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 5 +++++
 drivers/gpu/drm/i915/intel_guc_fwif.h | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6af9311f72f5..96bc0e83286a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3176,6 +3176,11 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	if (ret)
 		return ret;
 
+	if (HAS_GUC_SCHED(dev_priv)) {
+		ggtt->base.total -= GUC_GGTT_RESERVED_TOP;
+		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
+	}
+
 	if ((ggtt->base.total - 1) >> 32) {
 		DRM_ERROR("We never expected a Global GTT with more than 32bits"
 			  " of address space! Found %lldM!\n",
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 3202b32b5638..3361d38ed859 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -23,6 +23,9 @@
 #ifndef _INTEL_GUC_FWIF_H
 #define _INTEL_GUC_FWIF_H
 
+/* A small region at the top of the global GTT is reserved for use by the GuC */
+#define GUC_GGTT_RESERVED_TOP		0x1200000
+
 #define GFXCORE_FAMILY_GEN9		12
 #define GFXCORE_FAMILY_UNKNOWN		0x7fffffff
 
-- 
2.11.0