[Intel-gfx] [PATCH v4] drm/i915: Respect num_pipes when install or reset display IRQ

Wang Elaine elaine.wang at intel.com
Fri Dec 23 06:06:14 UTC 2016


From: Elaine Wang <elaine.wang at intel.com>

Some platforms don't have display. To avoid accessing the
non-existent display interrupt registers, check whether num_pipes
isn't zero before invoking display IRQ install or reset function.

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Jani Nikula <jani.nikula at linux.intel.com>
Signed-off-by: Elaine Wang <elaine.wang at intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a0e70f5..3c9a885 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2990,8 +2990,10 @@ static void gen8_irq_reset(struct drm_device *dev)
 						   POWER_DOMAIN_PIPE(pipe)))
 			GEN8_IRQ_RESET_NDX(DE_PIPE, pipe);
 
-	GEN5_IRQ_RESET(GEN8_DE_PORT_);
-	GEN5_IRQ_RESET(GEN8_DE_MISC_);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		GEN5_IRQ_RESET(GEN8_DE_PORT_);
+		GEN5_IRQ_RESET(GEN8_DE_MISC_);
+	}
 	GEN5_IRQ_RESET(GEN8_PCU_);
 
 	if (HAS_PCH_SPLIT(dev_priv))
@@ -3414,7 +3416,9 @@ static int gen8_irq_postinstall(struct drm_device *dev)
 		ibx_irq_pre_postinstall(dev);
 
 	gen8_gt_irq_postinstall(dev_priv);
-	gen8_de_irq_postinstall(dev_priv);
+
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		gen8_de_irq_postinstall(dev_priv);
 
 	if (HAS_PCH_SPLIT(dev_priv))
 		ibx_irq_postinstall(dev);
-- 
1.9.1



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