[Intel-gfx] [PATCH 1/2] drm : adds Y-coordinate and Colorimetry Format
Nagaraju, Vathsala
vathsala.nagaraju at intel.com
Fri Dec 23 14:25:59 UTC 2016
In DP V1.3 spec , Table 2-149 , page number-374 , for Register 0x2210 , bit 7:4 is reserved.
-----Original Message-----
From: Jani Nikula [mailto:jani.nikula at linux.intel.com]
Sent: Friday, December 23, 2016 6:57 PM
To: Nagaraju, Vathsala <vathsala.nagaraju at intel.com>; dri-devel at lists.freedesktop.org; intel-gfx at lists.freedesktop.org
Cc: Vivi, Rodrigo <rodrigo.vivi at intel.com>
Subject: Re: [Intel-gfx] [PATCH 1/2] drm : adds Y-coordinate and Colorimetry Format
On Thu, 22 Dec 2016, vathsala nagaraju <vathsala.nagaraju at intel.com> wrote:
> PSR2 vsc revision number hb2( as per table 6-11)is updated to
> 4 or 5 based on Y cordinate and Colorimetry Format as below 04h = 3D
> stereo + PSR/PSR2 + Y-coordinate.
> 05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel
> Encoding/Colorimetry Format indication. A DP Source device is allowed
> to indicate the pixel encoding/colorimetry format to the DP Sink
> device with VSC SDP only when the DP Sink device supports it (
> i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
> DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3; is
> set to 1).
>
> v2: (Jani)
> - Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
> - Add DP_PSR2_SU_GRANULARITY_REQUIRED.
> - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
> - Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Jim Bride <jim.bride at linux.intel.com>
> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju at intel.com>
> ---
> include/drm/drm_dp_helper.h | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 55bbeb0..ee2a649d 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -194,7 +194,8 @@
> # define DP_PSR_SETUP_TIME_0 (6 << 1)
> # define DP_PSR_SETUP_TIME_MASK (7 << 1)
> # define DP_PSR_SETUP_TIME_SHIFT 1
> -
> +# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
> +# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
> /*
> * 0x80-0x8f describe downstream port capabilities, but there are two layouts
> * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it
> was not, @@ -568,6 +569,11 @@
> #define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
> # define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
>
> +#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210
> +# define DP_GTC_CAP (1 << 0)
> +# define DP_AV_SYNC_CAP (1 << 2)
> +# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3)
The spec continues with bits 4 to 7 in the next page...
> +
> /* DP 1.2 Sideband message defines */
> /* peer device type - DP 1.2a Table 2-92 */
> #define DP_PEER_DEVICE_NONE 0x0
--
Jani Nikula, Intel Open Source Technology Center
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