[Intel-gfx] [APL PO PATCH] drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards
kbuild test robot
lkp at intel.com
Wed Feb 3 05:21:51 UTC 2016
Hi Deepak,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.5-rc2 next-20160202]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
url: https://github.com/0day-ci/linux/commits/Deepak-M/drm-i915-bxt-Additional-MIPI-clock-divider-form-B0-stepping-onwards/20160203-131111
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x019-201605 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_dsi_pll.c: In function 'bxt_enable_dsi_pll':
>> drivers/gpu/drm/i915/intel_dsi_pll.c:472:21: warning: unused variable 'dev' [-Wunused-variable]
struct drm_device *dev = encoder->base.dev;
^
vim +/dev +472 drivers/gpu/drm/i915/intel_dsi_pll.c
456 /* As per recommendation from hardware team,
457 * Prog PVD ratio =1 if dsi ratio <= 50
458 */
459 if (dsi_ratio <= 50) {
460 val &= ~BXT_DSI_PLL_PVD_RATIO_MASK;
461 val |= BXT_DSI_PLL_PVD_RATIO_1;
462 }
463
464 I915_WRITE(BXT_DSI_PLL_CTL, val);
465 POSTING_READ(BXT_DSI_PLL_CTL);
466
467 return true;
468 }
469
470 static void bxt_enable_dsi_pll(struct intel_encoder *encoder)
471 {
> 472 struct drm_device *dev = encoder->base.dev;
473 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
474 struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
475 enum port port;
476 u32 val;
477
478 DRM_DEBUG_KMS("\n");
479
480 val = I915_READ(BXT_DSI_PLL_ENABLE);
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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