[Intel-gfx] [PATCH v2 4/9] drm/i915/error: improve CSB reporting
Arun Siluvery
arun.siluvery at linux.intel.com
Wed Feb 10 15:50:05 UTC 2016
From: Dave Gordon <david.s.gordon at intel.com>
v2: add separators for readability
For: VIZ-2021
Signed-off-by: Dave Gordon <david.s.gordon at intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com> (v2)
---
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 77 +++++++++++++++++++++++++----------
2 files changed, 58 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cb8de49..549478f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -561,6 +561,8 @@ struct drm_i915_error_state {
u32 execlist_csb[6];
u32 execlist_ctx[6];
+ u64 ctx_desc;
+
struct drm_i915_error_object {
int page_count;
u64 gtt_offset;
@@ -568,7 +570,7 @@ struct drm_i915_error_state {
} *req_ringbuffer, *hw_ringbuffer, *batchbuffer, *wa_batchbuffer, *ctx, *hws_page;
struct drm_i915_error_request {
- uint64_t ctx_desc;
+ u64 ctx_desc;
long jiffies;
u32 seqno;
u32 tail;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index ac83f91..bdbc7ed 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -306,31 +306,57 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
ring->hangcheck_score);
if (i915.enable_execlists) {
+ u32 csb_rd = GEN8_CSB_READ_PTR(ring->execlist_csb_raw_pointer);
+
err_printf(m, " EXECLIST_STATUS: 0x%08x\n", ring->execlist_status);
err_printf(m, " EXECLIST_CTX_ID: 0x%08x\n", ring->execlist_ctx_id);
err_printf(m, " EXECLIST_CSBPTR: 0x%08x\n", ring->execlist_csb_raw_pointer);
- err_printf(m, " EXECLIST_CSB_WR: 0x%08x\n", ring->execlist_csb_write_pointer);
- err_printf(m, " EXECLIST_CSB_RD: 0x%08x\n", ring->execlist_csb_read_pointer);
+ err_printf(m, " EXECLIST_CSB_WR: %d\n", ring->execlist_csb_write_pointer);
+ err_printf(m, " EXECLIST_CSB_RD: %d\n", csb_rd);
+
+ for (i = 1; i <= GEN8_CSB_ENTRIES; ++i) {
+ int n = (ring->execlist_csb_write_pointer + i) % GEN8_CSB_ENTRIES;
+ u32 ctxid = ring->execlist_ctx[n];
+ u32 csb = ring->execlist_csb[n];
+ u32 tag = 0;
+ char dot = '.';
+ err_printf(m, " EXECLIST_CTX/CSB[%d]: ", n);
+
+ if (ctxid && i915.enable_guc_submission) {
+ /* GuC CtxID is ring + flags + (lrca >> 12) */
+ tag = ((ring_idx << 9) | 1);
+ }
+ if ((ctxid >> 20) != tag)
+ dot = '?'; /* flag unexpected value */
+ err_printf(m, "0x%03x%c%05x / ",
+ ctxid >> 20, dot, ctxid & 0x000fffff);
+/* CSB status bits */
#define GEN8_CTX_STATUS_IDLE_ACTIVE (1 << 0)
#define GEN8_CTX_STATUS_PREEMPTED (1 << 1)
#define GEN8_CTX_STATUS_ELEMENT_SWITCH (1 << 2)
#define GEN8_CTX_STATUS_ACTIVE_IDLE (1 << 3)
#define GEN8_CTX_STATUS_COMPLETE (1 << 4)
#define GEN8_CTX_STATUS_LITE_RESTORE (1 << 15)
-
- for (i = 1; i <= GEN8_CSB_ENTRIES; ++i) {
- int n = (ring->execlist_csb_write_pointer + i) % GEN8_CSB_ENTRIES;
- u32 csb = ring->execlist_csb[n];
- err_printf(m, " EXECLIST_CTX/CSB[%d]: 0x%08x 0x%08x ",
- n, ring->execlist_ctx[n], csb);
- err_printf(m, "%s %s %s %s %s %s\n",
- csb & GEN8_CTX_STATUS_IDLE_ACTIVE ? "I->A" : " ",
- csb & GEN8_CTX_STATUS_PREEMPTED ? "PRMT" : " ",
- csb & GEN8_CTX_STATUS_ELEMENT_SWITCH ? "ELSW" : " ",
- csb & GEN8_CTX_STATUS_ACTIVE_IDLE ? "A->I" : " ",
- csb & GEN8_CTX_STATUS_COMPLETE ? "DONE" : " ",
- csb & GEN8_CTX_STATUS_LITE_RESTORE ? "LITE" : " ");
+#define GEN8_CTX_STATUS_UNKNOWN (~0x0000801f) /* any other */
+
+ err_printf(m, "0x%08x | %s | %s | %s | %s | %s | %s | %s\n",
+ csb,
+ csb & GEN8_CTX_STATUS_IDLE_ACTIVE ? "I->A" : " ",
+ csb & GEN8_CTX_STATUS_PREEMPTED ? "PRMT" : " ",
+ csb & GEN8_CTX_STATUS_ELEMENT_SWITCH ? "ELSW" : " ",
+ csb & GEN8_CTX_STATUS_ACTIVE_IDLE ? "A->I" : " ",
+ csb & GEN8_CTX_STATUS_COMPLETE ? "DONE" : " ",
+ csb & GEN8_CTX_STATUS_LITE_RESTORE ? "LITE" : " ",
+ csb & GEN8_CTX_STATUS_UNKNOWN ? " +? " : " ");
+
+ if (i != 6) {
+ if (n == csb_rd)
+ err_printf(m, " *RD*\n");
+ else if (n == ring->execlist_csb_read_pointer &&
+ !i915.enable_guc_submission)
+ err_printf(m, " *SW*\n");
+ }
}
}
}
@@ -497,9 +523,11 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
}
if ((obj = error->ring[i].req_ringbuffer)) {
- err_printf(m, "%s --- ringbuffer = 0x%08x\n",
+ err_printf(m, "%s --- ringbuffer = 0x%08x (ctx_desc 0x%08x_%08x)\n",
dev_priv->ring[i].name,
- lower_32_bits(obj->gtt_offset));
+ lower_32_bits(obj->gtt_offset),
+ upper_32_bits(error->ring[i].ctx_desc),
+ lower_32_bits(error->ring[i].ctx_desc));
print_error_obj(m, obj);
}
@@ -1011,6 +1039,7 @@ static void i915_record_ring_state(struct drm_device *dev,
u32 status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring));
u8 write_pointer = GEN8_CSB_WRITE_PTR(status_pointer);
u8 read_pointer = ring->next_context_status_buffer;
+
if (read_pointer > write_pointer)
write_pointer += GEN8_CSB_ENTRIES;
@@ -1062,6 +1091,7 @@ static void i915_gem_record_rings(struct drm_device *dev,
{
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_i915_gem_request *request;
+ u64 ctx_desc;
int i, count;
for (i = 0; i < I915_NUM_RINGS; i++) {
@@ -1118,16 +1148,19 @@ static void i915_gem_record_rings(struct drm_device *dev,
* for it to be useful (e.g. dump the context being
* executed).
*/
- if (request)
- rbuf = request->ctx->engine[ring->id].ringbuf;
- else
- rbuf = dev_priv->kernel_context->engine[ring->id].ringbuf;
- } else
+ struct intel_context *ctx = (request ? request->ctx :
+ dev_priv->kernel_context);
+ ctx_desc = intel_lr_context_descriptor(ctx, ring);
+ rbuf = ctx->engine[ring->id].ringbuf;
+ } else {
+ ctx_desc = 0;
rbuf = ring->buffer;
+ }
error->ring[i].cpu_ring_head = rbuf->head;
error->ring[i].cpu_ring_tail = rbuf->tail;
+ error->ring[i].ctx_desc = ctx_desc;
error->ring[i].req_ringbuffer =
i915_error_ggtt_object_create(dev_priv, rbuf->obj);
--
1.9.1
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