[Intel-gfx] [PATCH] drm/i915: Avoid vblank counter for gen9+

[Ville Syrjälä]

On Thu, Feb 11, 2016 at 09:00:47AM -0800, Rodrigo Vivi wrote:
> Framecounter register is read-only so DMC cannot restore it
> after exiting DC5 and DC6.
> 
> Easiest way to go is to avoid the counter and use vblank
> interruptions for this platform and for all the following
> ones since DMC came to stay. At least while we can't change
> this register to read-write.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 25a8937..c294a4b 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -4556,7 +4556,10 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
>  
>  	pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
>  
> -	if (IS_GEN2(dev_priv)) {
> +	if (INTEL_INFO(dev_priv)->gen >= 9) {
> +		dev->max_vblank_count = 0;
> +		dev->driver->get_vblank_counter = g4x_get_vblank_counter;

= i8xx_get_vblank_counter

> +	} else if (IS_GEN2(dev_priv)) {
>  		dev->max_vblank_count = 0;
>  		dev->driver->get_vblank_counter = i8xx_get_vblank_counter;
>  	} else if (IS_G4X(dev_priv) || INTEL_INFO(dev_priv)->gen >= 5) {
> @@ -4572,7 +4575,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
>  	 * Gen2 doesn't have a hardware frame counter and so depends on
>  	 * vblank interrupts to produce sane vblank seuquence numbers.
>  	 */
> -	if (!IS_GEN2(dev_priv))
> +	if (!IS_GEN2(dev_priv) && !INTEL_INFO(dev_priv)->gen >= 9)
>  		dev->vblank_disable_immediate = true;

You can just drop this part.

>  
>  	dev->driver->get_vblank_timestamp = i915_get_vblank_timestamp;
> -- 
> 2.4.3
> 
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-- 
Ville Syrjälä
Intel OTC