[Intel-gfx] [PATCH] drm/i915: Fix to allow render compression on primary plane of PIPEB

[Daniel Vetter]

On Fri, Feb 05, 2016 at 06:51:53AM +0530, Thulasimani, Sivakumar wrote:
> not sure how this can be pushed separately even if approved at present.
> why not push this as part of new patch set of the RC patches ?

Yes, please don't send around patches which need depencies. Instead squash
them into the original patch (if it's a clear fixup) or add it as another
patch in the overall series (if it's a separate logical step in enabling a
feature and more involved).

Sending patches without their requirements just confuses CI&people.

Thanks, Daniel
> 
> but ignoring the dependency this is fine.
> Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani at intel.com>
> 
> On 2/4/2016 11:44 AM, Mayuresh Gharpure wrote:
> >Currently, a flip with render compression enabled is failing on primary
> >plane of HDMI panel which is driven by PIPEB, this issue is fixed with
> >this patch
> >
> >Change-Id: I197fe61faffad9da58733ed3f0e8cf6ef8640af7
> >Signed-off-by: Mayuresh Gharpure <mayuresh.s.gharpure at intel.com>
> >---
> >Please note that this patch depends on following patch:
> >https://patchwork.freedesktop.org/patch/67448/
> >
> >Current patch is a bug fix on the above mentioned patch
> >  drivers/gpu/drm/i915/intel_display.c | 12 ++++++++----
> >  1 file changed, 8 insertions(+), 4 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >index 4b23ec2..f8485fa 100644
> >--- a/drivers/gpu/drm/i915/intel_display.c
> >+++ b/drivers/gpu/drm/i915/intel_display.c
> >@@ -12777,10 +12777,6 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
> >  		if (fb && to_intel_plane_state(plane_state)->
> >  				render_comp_enable) {
> >-			if (to_intel_plane(plane)->plane != PLANE_A) {
> >-				DRM_DEBUG_KMS("RC supported only on planes 1 & 2\n");
> >-				return -EINVAL;
> >-			}
> >  			ret = skl_check_compression(dev,
> >  					to_intel_plane_state(plane_state),
> >  					intel_crtc->pipe, crtc->x, crtc->y);
> >@@ -15088,6 +15084,7 @@ static int skl_check_compression(struct drm_device *dev,
> >  		enum pipe pipe, int x, int y)
> >  {
> >  	struct drm_framebuffer *fb = plane_state->base.fb;
> >+	struct drm_plane *plane = plane_state->base.plane;
> >  	int x_offset;
> >  	int src_w = drm_rect_width(&plane_state->src) >> 16;
> >@@ -15127,6 +15124,13 @@ static int skl_check_compression(struct drm_device *dev,
> >  		return -EINVAL;
> >  	}
> >+	if (!(plane->type == DRM_PLANE_TYPE_PRIMARY ||
> >+		(plane->type == DRM_PLANE_TYPE_OVERLAY &&
> >+			to_intel_plane(plane)->plane == PLANE_A))) {
> >+		DRM_DEBUG_KMS("RC supported only on planes 1 & 2\n");
> >+		return -EINVAL;
> >+	}
> >+
> >  	if (intel_rotation_90_or_270(plane_state->base.rotation)) {
> >  		DRM_DEBUG_KMS("RC support only with 0/180 degree rotation\n");
> >  		return -EINVAL;
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch