[Intel-gfx] [PATCH] drm/i915/skl: Ensure HW is powered during DDB HW state readout

[Jani Nikula]

On Wed, 17 Feb 2016, Imre Deak <imre.deak at intel.com> wrote:
> The assumption when adding the intel_display_power_is_enabled() checks
> was that if it returns success the power can't be turned off afterwards
> during the HW access, which is guaranteed by modeset locks. This isn't
> always true, so make sure we hold a dedicated reference for the time of
> the access.
>
> Spotted-by: Mika Kuoppala <mika.kuoppala at intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93441
> CC: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Imre Deak <imre.deak at intel.com>

Cc: fixes or stable? Fixes which commit?

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index b63cdb2..347d4df 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2851,7 +2851,10 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
>  	memset(ddb, 0, sizeof(*ddb));
>  
>  	for_each_pipe(dev_priv, pipe) {
> -		if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PIPE(pipe)))
> +		enum intel_display_power_domain power_domain;
> +
> +		power_domain = POWER_DOMAIN_PIPE(pipe);
> +		if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
>  			continue;
>  
>  		for_each_plane(dev_priv, pipe, plane) {
> @@ -2863,6 +2866,8 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
>  		val = I915_READ(CUR_BUF_CFG(pipe));
>  		skl_ddb_entry_init_from_hw(&ddb->plane[pipe][PLANE_CURSOR],
>  					   val);
> +
> +		intel_display_power_put(dev_priv, power_domain);
>  	}
>  }

-- 
Jani Nikula, Intel Open Source Technology Center