[Intel-gfx] [RFCv2 11/14] drm/i915: Introduce execlist context status change notification

[Zhi Wang]

This patch introduces an approach for clients to aware the execlist context
status change.

For a GVT context, GVT-g kernel device model uses it as the "shadow
context", its contents will be copied back to guest after the context is
idle. So GVT-g kernel device model has to know the status of the execlist
context, also it will switch the render registers when the context is
schedued-in/out.

This function is configurable as a parameter in the context creation
service. Currently, Only GVT-g will create the "status-change-notification"
enabled GEM context.

Signed-off-by: Zhi Wang <zhi.a.wang at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h  |  2 ++
 drivers/gpu/drm/i915/intel_lrc.c | 28 ++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_lrc.h |  6 ++++++
 3 files changed, 36 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 86a5646..1f94df2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -887,6 +887,8 @@ struct intel_context {
 		struct i915_vma *lrc_vma;
 		u64 lrc_desc;
 		uint32_t *lrc_reg_state;
+		bool need_status_change_notification;
+		struct atomic_notifier_head notifier_head;
 	} engine[I915_NUM_RINGS];
 	bool root_pointer_dirty;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e0ab5b3..07aa5da 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -438,6 +438,18 @@ static void execlists_submit_requests(struct drm_i915_gem_request *rq0,
 	execlists_elsp_write(rq0, rq1);
 }
 
+static inline void execlists_context_status_change(
+		struct intel_context *ctx,
+		struct intel_engine_cs *ring,
+		unsigned long status)
+{
+	if (!ctx->engine[ring->id].need_status_change_notification)
+		return;
+
+	atomic_notifier_call_chain(&ctx->engine[ring->id].notifier_head,
+			status, NULL);
+}
+
 static void execlists_context_unqueue(struct intel_engine_cs *ring)
 {
 	struct drm_i915_gem_request *req0 = NULL, *req1 = NULL;
@@ -494,6 +506,13 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring)
 
 	WARN_ON(req1 && req1->elsp_submitted);
 
+	execlists_context_status_change(req0->ctx, ring, CONTEXT_SCHEDULE_IN);
+
+	if (req1) {
+		execlists_context_status_change(req1->ctx,
+			ring, CONTEXT_SCHEDULE_IN);
+	}
+
 	execlists_submit_requests(req0, req1);
 }
 
@@ -514,6 +533,8 @@ static bool execlists_check_remove_request(struct intel_engine_cs *ring,
 			     "Never submitted head request\n");
 
 			if (--head_req->elsp_submitted <= 0) {
+				execlists_context_status_change(head_req->ctx,
+					ring, CONTEXT_SCHEDULE_OUT);
 				list_move_tail(&head_req->execlist_link,
 					       &ring->execlist_retired_req_list);
 				return true;
@@ -2589,6 +2610,13 @@ int __intel_lr_context_deferred_alloc(struct intel_context *ctx,
 		}
 		i915_add_request_no_flush(req);
 	}
+
+	if (params->ctx_needs_status_change_notification) {
+		ctx->engine[ring->id].need_status_change_notification = true;
+		ATOMIC_INIT_NOTIFIER_HEAD(
+			&ctx->engine[ring->id].notifier_head);
+	}
+
 	return 0;
 
 error_ringbuf:
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 528c4fb..15791d4 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -54,6 +54,11 @@
 #define GEN8_CSB_READ_PTR(csb_status) \
 	(((csb_status) & GEN8_CSB_READ_PTR_MASK) >> 8)
 
+enum {
+	CONTEXT_SCHEDULE_IN = 0,
+	CONTEXT_SCHEDULE_OUT,
+};
+
 /* Logical Rings */
 int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
 int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request);
@@ -101,6 +106,7 @@ struct intel_lr_context_alloc_params {
 	struct intel_engine_cs *ring;
 	u32 ringbuffer_size;
 	bool ctx_needs_init;
+	bool ctx_needs_status_change_notification;
 };
 
 void intel_lr_context_free(struct intel_context *ctx);
-- 
1.9.1