[Intel-gfx] [PATCH] drm/i915: Avoid divbyzero in modesetting

[Maarten Lankhorst]

Hey,

Op 22-02-16 om 12:52 schreef Tvrtko Ursulin:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>
> Not sure if intel_wm_config->num_pipes_active is supposed to
> ever be zero when intel_update_watermarks gets called. But
> since it can be triggered in early platform bringup perhaps
> we want to guard against it rather than divide by zero.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Daniel Vetter <daniel at ffwll.ch>
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index feb57598727a..2b7998889617 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2831,8 +2831,13 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
>  		nth_active_pipe++;
>  	}
>  
> -	pipe_size = ddb_size / config->num_pipes_active;
> -	alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active;
> +	if (WARN_ON(!config->num_pipes_active)) {
> +		pipe_size = 0;
> +		alloc->start = 0;
> +	} else {
> +		pipe_size = ddb_size / config->num_pipes_active;
> +		alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active;
> +	}
>  	alloc->end = alloc->start + pipe_size;
>  }
>  
How can this happen? It seems in that case cstate->base.active would be false for the current pipe,
and the code should bail early already..