[Intel-gfx] [PATCH] drm/i915: Avoid divbyzero in modesetting

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Mon Feb 22 15:22:02 UTC 2016


On 22/02/16 14:56, Maarten Lankhorst wrote:
> Op 22-02-16 om 15:27 schreef Tvrtko Ursulin:
>> On 22/02/16 13:09, Maarten Lankhorst wrote:
>>> Hey,
>>>
>>> Op 22-02-16 om 12:52 schreef Tvrtko Ursulin:
>>>> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>>>>
>>>> Not sure if intel_wm_config->num_pipes_active is supposed to
>>>> ever be zero when intel_update_watermarks gets called. But
>>>> since it can be triggered in early platform bringup perhaps
>>>> we want to guard against it rather than divide by zero.
>>>>
>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>>>> Cc: Matt Roper <matthew.d.roper at intel.com>
>>>> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
>>>> Cc: Daniel Vetter <daniel at ffwll.ch>
>>>> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
>>>> ---
>>>>    drivers/gpu/drm/i915/intel_pm.c | 9 +++++++--
>>>>    1 file changed, 7 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>>>> index feb57598727a..2b7998889617 100644
>>>> --- a/drivers/gpu/drm/i915/intel_pm.c
>>>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>>>> @@ -2831,8 +2831,13 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
>>>>    		nth_active_pipe++;
>>>>    	}
>>>>
>>>> -	pipe_size = ddb_size / config->num_pipes_active;
>>>> -	alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active;
>>>> +	if (WARN_ON(!config->num_pipes_active)) {
>>>> +		pipe_size = 0;
>>>> +		alloc->start = 0;
>>>> +	} else {
>>>> +		pipe_size = ddb_size / config->num_pipes_active;
>>>> +		alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active;
>>>> +	}
>>>>    	alloc->end = alloc->start + pipe_size;
>>>>    }
>>>>
>>> How can this happen? It seems in that case cstate->base.active would be false for the current pipe,
>>> and the code should bail early already..
>> Don't know, but does it harm to guard against it? Helps early
>> platform bringup a bit.
>>
>>   [drm:intel_modeset_readout_hw_state] [CRTC:21] hw state readout: enabled
>>   [drm:intel_modeset_readout_hw_state] [CRTC:26] hw state readout: disabled
>>   [drm:intel_modeset_readout_hw_state] [CRTC:31] hw state readout: disabled
>>   [drm:intel_modeset_readout_hw_state] PORT PLL A hw state readout: crtc_mask 0x00000001, on 0
>>   [drm:intel_modeset_readout_hw_state] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0
>>   [drm:intel_modeset_readout_hw_state] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:33:TMDS-33] hw state readout: disabled, pipe A
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:35:DP MST-35] hw state readout: disabled, pipe A
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:36:DP MST-36] hw state readout: disabled, pipe B
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:37:DP MST-37] hw state readout: disabled, pipe C
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:42:TMDS-42] hw state readout: disabled, pipe A
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:44:DP MST-44] hw state readout: disabled, pipe A
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:45:DP MST-45] hw state readout: disabled, pipe B
>>   [drm:intel_modeset_readout_hw_state] [ENCODER:46:DP MST-46] hw state readout: disabled, pipe C
>>   [drm:intel_modeset_readout_hw_state] [CONNECTOR:34:DP-1] hw state readout: disabled
>>   [drm:intel_modeset_readout_hw_state] [CONNECTOR:40:HDMI-A-1] hw state readout: disabled
>>   [drm:intel_modeset_readout_hw_state] [CONNECTOR:43:DP-2] hw state readout: disabled
>>   [drm:intel_modeset_readout_hw_state] [CONNECTOR:47:HDMI-A-2] hw state readout: disabled
>>   [drm:drm_calc_timestamping_constants [drm]] *ERROR* crtc 21: Can't calculate constants, dotclock = 0!
>>   [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>>   [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>>   [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>>   [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>>   [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>>   [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>>   [drm:intel_disable_pipe] disabling pipe A
>>
> Uh oh, we didn't update the atomic state which confused the wm stuff.
>
> Does the below work?

Yep, with your patch it doesn't trigger my would-be-div-by-zero warning 
any more.

Regards,

Tvrtko


More information about the Intel-gfx mailing list