[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v3)
Ville Syrjälä
ville.syrjala at linux.intel.com
Thu Feb 25 17:46:37 UTC 2016
On Tue, Feb 16, 2016 at 11:28:05AM -0000, Patchwork wrote:
> == Summary ==
>
> Series 3455v1 drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v3)
> http://patchwork.freedesktop.org/api/1.0/series/3455/revisions/1/mbox/
>
> Test gem_ringfill:
> Subgroup basic-default-hang:
> incomplete -> PASS (snb-dellxps)
> Test gem_sync:
> Subgroup basic-bsd:
> dmesg-fail -> PASS (ilk-hp8440p)
> Test kms_flip:
> Subgroup basic-flip-vs-dpms:
> dmesg-warn -> PASS (ilk-hp8440p) UNSTABLE
> Subgroup basic-flip-vs-wf_vblank:
> pass -> FAIL (snb-x220t)
(kms_flip:5932) DEBUG: name = flip
last_ts = 229.786169 usec
last_received_ts = 229.785609 usec
last_seq = 9555
current_ts = 229.970103 usec
current_received_ts = 229.983336 usec
current_seq = 9566
count = 30
seq_step = 1
(kms_flip:5932) CRITICAL: Test assertion failure function check_state, file kms_flip.c:692:
(kms_flip:5932) CRITICAL: Failed assertion: fabs((((double) diff.tv_usec) - usec_interflip) / usec_interflip) <= 0.005
(kms_flip:5932) CRITICAL: Last errno: 25, Inappropriate ioctl for device
(kms_flip:5932) CRITICAL: inter-flip ts jitter: 0s, 183934usec
Kinda looks like we were supposed to wait for 1 vblank and instead we
did 11. Not sure what happended.
> Test kms_force_connector_basic:
> Subgroup force-load-detect:
> fail -> SKIP (ivb-t430s)
> Test pm_rpm:
> Subgroup basic-pci-d3-state:
> pass -> FAIL (bdw-nuci7)
https://bugs.freedesktop.org/show_bug.cgi?id=94163
>
> bdw-nuci7 total:162 pass:151 dwarn:0 dfail:0 fail:1 skip:10
> bdw-ultra total:165 pass:152 dwarn:0 dfail:0 fail:0 skip:13
> bsw-nuc-2 total:165 pass:135 dwarn:1 dfail:0 fail:0 skip:29
> byt-nuc total:165 pass:140 dwarn:1 dfail:0 fail:0 skip:24
> hsw-brixbox total:165 pass:151 dwarn:0 dfail:0 fail:0 skip:14
> hsw-gt2 total:165 pass:154 dwarn:0 dfail:0 fail:1 skip:10
> ilk-hp8440p total:165 pass:116 dwarn:0 dfail:0 fail:1 skip:48
> ivb-t430s total:165 pass:150 dwarn:0 dfail:0 fail:0 skip:15
> skl-i5k-2 total:165 pass:150 dwarn:0 dfail:0 fail:0 skip:15
> snb-dellxps total:165 pass:142 dwarn:0 dfail:0 fail:1 skip:22
> snb-x220t total:165 pass:141 dwarn:0 dfail:0 fail:3 skip:21
>
> Results at /archive/results/CI_IGT_test/Patchwork_1410/
>
> 63cbdd1816fd78d404ed004b0f931c497625e0df drm-intel-nightly: 2016y-02m-16d-09h-41m-02s UTC integration manifest
> b84ef2badea15712a81923b7df4706b24bc169ca drm/i915: Make sure fb offset is (macro)pixel aligned
> ca71915fbb9c4c8ba57604ce6c8845fe03a43d7a drm/i915: Deal with NV12 CbCr plane AUX surface on SKL+
> d7f9294ecc8efdc5ee8ab82f507fbdfa908c85aa drm/i915: Compute display surface offset in the plane check hook for SKL+
> 8bef0691c82442ec596fdc70567f8c5e2811ae05 drm/i915: Make intel_adjust_tile_offset() work for linear buffers
> 1a99c9e2231d7e6f09606019ffe5adf7f0a80357 drm/i915: Allow calling intel_adjust_tile_offset() multiple times
> c49b5375a08ed884e8606ef7d31a6715cbb25f0c drm/i915: Limit fb x offset due to fences
> 7491f5ca5dab46dd1a76cf29aafdfc0d4e98bb1e drm/i915: Adjust obj tiling vs. fb modifier rules
> 185515a0d9c827dc1cac159fcadd73b9fb90b679 drm/i915: Use fb modifiers for display tiling decisions
> 803c4b6df97ec77ea9d03f9c08df0937227533fb drm/i915: Pass around plane_state instead of fb+rotation
> 6b6b376594dcb603d281ec732e1e5059d6619384 drm/i915: Move SKL hw stride calculation into a helper
> b06dc2a2512b136c01ff44537e003cfe83d7a819 drm/i915: Don't pass pitch to intel_compute_page_offset()
> defd01e2e7134e7a4885520c20e957d3be3e1447 drm/i915: Rewrite fb rotation GTT handling
> b160930772ba5b6c5288721316a1691f466b3359 drm/i915: Embed rotation_info under intel_framebuffer
> 5cac19f82e3eec58a3f5d804f4c1f381480193e4 drm/i915: Move the NULL sg handling out from rotate_pages()
> 2a89ffc5be0aee76cb70415a04f9df031b2f6f68 drm/i915: Reorganize intel_rotation_info
> 69bc06403bc4d1218a6b58ac5286e8fe7d68d1a4 drm/i915: Pass drm_frambuffer to intel_compute_page_offset()
> 1cf4455801c0ac86ea4c3634f96c725834244d09 drm/i915: Don't pass plane+plane_state to intel_pin_and_fence_fb_obj()
> e83c7b76fb678f07f688db4b3e7aa7a0e057d742 drm/i915: Support for extra alignment for tiled surfaces
> e685ff00fa6cb9d4a9511247cc272897f59ea71e drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_offset()
> 27fd3a6e846364496becb6cdada752ec905d6f1b drm/i915: s/tile_width/tile_width_bytes/
> 59b7e88935861c72c8f0ca8c3fcbe2cfe14a4d46 drm/i915: Account for the size of the chroma plane for the rotated gtt view
--
Ville Syrjälä
Intel OTC
More information about the Intel-gfx
mailing list