[Intel-gfx] [PATCH 2/2] drm/i915/gen9: Calculate edram size

[Daniel Vetter]

On Fri, Jan 08, 2016 at 06:58:45PM +0200, Mika Kuoppala wrote:
> With gen9+ the edram capabilities are defined so
> that we can calculate the edram (ellc) size accordingly.
> 
> Note that there are undefined combinations for some subset of
> edram capability bits. Return the closest size for undefined indexes.
> Even if we get it wrong with beginning of future gen enabling, the size
> information is currently only used for boot message and in debugfs entry.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h     | 14 ++++++++++++++
>  drivers/gpu/drm/i915/intel_uncore.c |  9 +++++----
>  2 files changed, 19 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f88b75ec5047..52283c44a0c1 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6820,6 +6820,20 @@ enum skl_disp_power_wells {
>  #define    IDIHASHMSK(x)			(((x) & 0x3f) << 16)
>  #define  HSW_EDRAM_CAP				_MMIO(0x120010)
>  #define    EDRAM_ENABLED			0x1
> +#define    EDRAM_NUM_BANKS(cap)			(((cap) >> 1) & 0xf)
> +#define    __EDRAM_WAYS(cap)			(((cap) >> 5) & 0x7)
> +#define    EDRAM_NUM_WAYS(cap)			({ \
> +			int __ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 }; \
> +			__ways[__EDRAM_WAYS(cap)]; \
> +})
> +#define    __EDRAM_SETS(cap)			(((cap) >> 8) & 0x3)
> +#define    EDRAM_NUM_SETS(cap)			({ \
> +			int __sets[4] = { 1, 1, 2, 2 }; \
> +			__sets[__EDRAM_SETS(cap)]; \
> +})
> +#define    EDRAM_SIZE(cap)			(EDRAM_NUM_BANKS(cap) * \
> +						 EDRAM_NUM_WAYS(cap) * \
> +						 EDRAM_NUM_SETS(cap))

Please just make a function out of this, no reason to make it into a
hard-to-read macro. E.g. gen9_edram_size or whatever is the first gen this
starts to be valid for.
-Daniel

>  
>  #define GEN6_UCGCTL1				_MMIO(0x9400)
>  # define GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE		(1 << 16)
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 0c9059cb3d13..c5fb1937b82d 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -315,12 +315,13 @@ unsigned intel_uncore_edram_size_mb(struct drm_i915_private *dev_priv)
>  	if (!HAS_EDRAM(dev_priv))
>  		return 0;
>  
> -	/* The docs do not explain exactly how the calculation can be
> -	 * made. It is somewhat guessable, but for now, it's always
> -	 * 128MB.
> +	/* The needed capability bits for size calculation
> +	 * are not there with pre gen9 so return 128MB always.
>  	 */
> +	if (INTEL_INFO(dev_priv)->gen < 9)
> +		return 128;
>  
> -	return 128;
> +	return EDRAM_SIZE(dev_priv->edram_cap);
>  }
>  
>  static void intel_uncore_edram_detect(struct drm_i915_private *dev_priv)
> -- 
> 2.5.0
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch