[Intel-gfx] [PATCH] drm/i915: Handle PipeC fused off on HSW

[Gabriel Feceoru]

On 11.01.2016 19:56, Ville Syrjälä wrote:
> On Mon, Dec 21, 2015 at 01:57:22PM +0200, Gabriel Feceoru wrote:
>> On some HSW boards all pipeC tests fail with various dmesg errors.
>> This seems to be caused by Pipe C beeing disabled in FUSE_STRAP and
>> thus reading back the PIPECONF register is always zero.
>>
>> Fixed by adjusting pipe_count to 2 and thus the pipeC igt tests will
>> be skipped.
>>
>> Signed-off-by: Gabriel Feceoru <gabriel.feceoru at intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_dma.c | 3 +++
>>   drivers/gpu/drm/i915/i915_reg.h | 1 +
>>   2 files changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
>> index 988a380..130a496 100644
>> --- a/drivers/gpu/drm/i915/i915_dma.c
>> +++ b/drivers/gpu/drm/i915/i915_dma.c
>> @@ -813,6 +813,9 @@ static void intel_device_info_runtime_init(struct drm_device *dev)
>>   		     !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
>>   			DRM_INFO("Display fused off, disabling\n");
>>   			info->num_pipes = 0;
>> +		} else if (I915_READ(FUSE_STRAP) & HSW_PIPE_C_DISABLE) {
>> +			DRM_INFO("PipeC fused off\n");
>> +			info->num_pipes = 2;
>>   		}
>>   	}
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 007ae83..0432a5f 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -5940,6 +5940,7 @@ enum skl_disp_power_wells {
>>   #define  ILK_INTERNAL_GRAPHICS_DISABLE	(1 << 31)
>>   #define  ILK_INTERNAL_DISPLAY_DISABLE	(1 << 30)
>>   #define  ILK_DISPLAY_DEBUG_DISABLE	(1 << 29)
>> +#define  HSW_PIPE_C_DISABLE		(1 << 28)
>
> According to Bspec the bit is already present on IVB.
IVB and HSW are both Gen7. Are you suggesting it should be named 
IVB_PIPE_C_DISABLE instead?
>
>>   #define  ILK_HDCP_DISABLE		(1 << 25)
>>   #define  ILK_eDP_A_DISABLE		(1 << 24)
>>   #define  HSW_CDCLK_LIMIT		(1 << 24)
>> --
>> 1.9.1
>>
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>