[Intel-gfx] [PATCH] drm/i915: Clear pending reset requests during suspend

[Chris Wilson]

On Thu, Jan 14, 2016 at 10:49:45AM +0000, Arun Siluvery wrote:
> Pending reset requests are cleared before suspending, they should be picked up
> after resume when new work is submitted.
> 
> This is originally added as part of TDR patches for Gen8 from Tomas Elf which
> are under review, as suggested by Chris this is extracted as a separate patch
> as it can be useful now.
> 
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index f17a2b0..09ed83e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -594,6 +594,13 @@ static int i915_drm_suspend(struct drm_device *dev)
>  		goto out;
>  	}
>  
> +	/*
> +	 * Clear any pending reset requests. They should be picked up
> +	 * after resume when new work is submitted
> +	 */
> +	atomic_clear_mask(I915_RESET_IN_PROGRESS_FLAG,
> +			  &dev_priv->gpu_error.reset_counter);
> +

The comment is slightly wrong. When the error tasklet in progress sees
that the flag is unset, it return (i.e. doesn't perform the reset).

This is ok, because we are putting the device to PCI_D3, we are powering
it down which should be our ultimate reset. So no need for the reset on
resume. Except.... We do need to clean up the bookkeeping. Hmm. so what
we need to do is actually flush the reset task, and pretend it succeeded.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre