[Intel-gfx] [PATCH v3 2/3] drm/i915: abolish separate per-ring default_context pointers

Daniel Vetter daniel at ffwll.ch
Tue Jan 19 00:54:35 PST 2016


On Mon, Jan 18, 2016 at 04:16:39PM +0000, Nick Hoath wrote:
> On 07/01/2016 10:20, Dave Gordon wrote:
> >Now that we've eliminated a lot of uses of ring->default_context,
> >we can eliminate the pointer itself.
> >
> >All the engines share the same default intel_context, so we can just
> >keep a single reference to it in the dev_priv structure rather than one
> >in each of the engine[] elements. This make refcounting more sensible
> >too, as we now have a refcount of one for the one pointer, rather than
> >a refcount of one but multiple pointers.
> >
> > From an idea by Chris Wilson.
> >
> >Signed-off-by: Dave Gordon <david.s.gordon at intel.com>
> 
> Reviewed-by: Nick Hoath <nicholas.hoath at intel.com>

In the interest of hampering my popularity I wanted to to merge the first
two patches in this series, but this one here conflicts with patches
Tvrtko just merged. Also this seems to have fallen into a period where CI
was down, so lacking bat results too. Can you pls resend?

Thanks, Daniel
> 
> >---
> >  drivers/gpu/drm/i915/i915_debugfs.c        |  4 ++--
> >  drivers/gpu/drm/i915/i915_drv.h            |  2 ++
> >  drivers/gpu/drm/i915/i915_gem.c            |  6 +++---
> >  drivers/gpu/drm/i915/i915_gem_context.c    | 22 ++++++++--------------
> >  drivers/gpu/drm/i915/i915_gpu_error.c      |  2 +-
> >  drivers/gpu/drm/i915/i915_guc_submission.c |  6 +++---
> >  drivers/gpu/drm/i915/intel_lrc.c           | 24 +++++++++++++-----------
> >  drivers/gpu/drm/i915/intel_ringbuffer.h    |  1 -
> >  8 files changed, 32 insertions(+), 35 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> >index 0fc38bb..2613708 100644
> >--- a/drivers/gpu/drm/i915/i915_debugfs.c
> >+++ b/drivers/gpu/drm/i915/i915_debugfs.c
> >@@ -1943,7 +1943,7 @@ static int i915_context_status(struct seq_file *m, void *unused)
> >  		seq_puts(m, "HW context ");
> >  		describe_ctx(m, ctx);
> >  		for_each_ring(ring, dev_priv, i) {
> >-			if (ring->default_context == ctx)
> >+			if (dev_priv->kernel_context == ctx)
> >  				seq_printf(m, "(default context %s) ",
> >  					   ring->name);
> >  		}
> >@@ -2039,7 +2039,7 @@ static int i915_dump_lrc(struct seq_file *m, void *unused)
> >
> >  	list_for_each_entry(ctx, &dev_priv->context_list, link) {
> >  		for_each_ring(ring, dev_priv, i) {
> >-			if (ring->default_context != ctx)
> >+			if (dev_priv->kernel_context != ctx)
> >  				i915_dump_lrc_obj(m, ring,
> >  						  ctx->engine[i].state);
> >  		}
> >diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >index c2b000a..aef86a8 100644
> >--- a/drivers/gpu/drm/i915/i915_drv.h
> >+++ b/drivers/gpu/drm/i915/i915_drv.h
> >@@ -1940,6 +1940,8 @@ struct drm_i915_private {
> >  		void (*stop_ring)(struct intel_engine_cs *ring);
> >  	} gt;
> >
> >+	struct intel_context *kernel_context;
> >+
> >  	bool edp_low_vswing;
> >
> >  	/* perform PHY state sanity checks? */
> >diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> >index c908ed1..8f101121 100644
> >--- a/drivers/gpu/drm/i915/i915_gem.c
> >+++ b/drivers/gpu/drm/i915/i915_gem.c
> >@@ -2678,7 +2678,7 @@ void i915_gem_request_free(struct kref *req_ref)
> >
> >  	if (ctx) {
> >  		if (i915.enable_execlists) {
> >-			if (ctx != req->ring->default_context)
> >+			if (ctx != req->i915->kernel_context)
> >  				intel_lr_context_unpin(req);
> >  		}
> >
> >@@ -2774,7 +2774,7 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
> >  	int err;
> >
> >  	if (ctx == NULL)
> >-		ctx = engine->default_context;
> >+		ctx = to_i915(engine->dev)->kernel_context;
> >  	err = __i915_gem_request_alloc(engine, ctx, &req);
> >  	return err ? ERR_PTR(err) : req;
> >  }
> >@@ -4862,7 +4862,7 @@ i915_gem_init_hw(struct drm_device *dev)
> >  	 */
> >  	init_unused_rings(dev);
> >
> >-	BUG_ON(!dev_priv->ring[RCS].default_context);
> >+	BUG_ON(!dev_priv->kernel_context);
> >
> >  	ret = i915_ppgtt_init_hw(dev);
> >  	if (ret) {
> >diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> >index 900ffd0..e1d767e 100644
> >--- a/drivers/gpu/drm/i915/i915_gem_context.c
> >+++ b/drivers/gpu/drm/i915/i915_gem_context.c
> >@@ -354,11 +354,10 @@ int i915_gem_context_init(struct drm_device *dev)
> >  {
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	struct intel_context *ctx;
> >-	int i;
> >
> >  	/* Init should only be called once per module load. Eventually the
> >  	 * restriction on the context_disabled check can be loosened. */
> >-	if (WARN_ON(dev_priv->ring[RCS].default_context))
> >+	if (WARN_ON(dev_priv->kernel_context))
> >  		return 0;
> >
> >  	if (intel_vgpu_active(dev) && HAS_LOGICAL_RING_CONTEXTS(dev)) {
> >@@ -388,12 +387,7 @@ int i915_gem_context_init(struct drm_device *dev)
> >  		return PTR_ERR(ctx);
> >  	}
> >
> >-	for (i = 0; i < I915_NUM_RINGS; i++) {
> >-		struct intel_engine_cs *ring = &dev_priv->ring[i];
> >-
> >-		/* NB: RCS will hold a ref for all rings */
> >-		ring->default_context = ctx;
> >-	}
> >+	dev_priv->kernel_context = ctx;
> >
> >  	DRM_DEBUG_DRIVER("%s context support initialized\n",
> >  			i915.enable_execlists ? "LR" :
> >@@ -404,7 +398,7 @@ int i915_gem_context_init(struct drm_device *dev)
> >  void i915_gem_context_fini(struct drm_device *dev)
> >  {
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >-	struct intel_context *dctx = dev_priv->ring[RCS].default_context;
> >+	struct intel_context *dctx = dev_priv->kernel_context;
> >  	int i;
> >
> >  	if (dctx->legacy_hw_ctx.rcs_state) {
> >@@ -431,17 +425,17 @@ void i915_gem_context_fini(struct drm_device *dev)
> >  		i915_gem_object_ggtt_unpin(dctx->legacy_hw_ctx.rcs_state);
> >  	}
> >
> >-	for (i = 0; i < I915_NUM_RINGS; i++) {
> >+	for (i = I915_NUM_RINGS; --i >= 0;) {
> >  		struct intel_engine_cs *ring = &dev_priv->ring[i];
> >
> >-		if (ring->last_context)
> >+		if (ring->last_context) {
> >  			i915_gem_context_unreference(ring->last_context);
> >-
> >-		ring->default_context = NULL;
> >-		ring->last_context = NULL;
> >+			ring->last_context = NULL;
> >+		}
> >  	}
> >
> >  	i915_gem_context_unreference(dctx);
> >+	dev_priv->kernel_context = NULL;
> >  }
> >
> >  int i915_gem_context_enable(struct drm_i915_gem_request *req)
> >diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> >index 06ca408..7eeb244 100644
> >--- a/drivers/gpu/drm/i915/i915_gpu_error.c
> >+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> >@@ -1050,7 +1050,7 @@ static void i915_gem_record_rings(struct drm_device *dev,
> >  			if (request)
> >  				rbuf = request->ctx->engine[ring->id].ringbuf;
> >  			else
> >-				rbuf = ring->default_context->engine[ring->id].ringbuf;
> >+				rbuf = dev_priv->kernel_context->engine[ring->id].ringbuf;
> >  		} else
> >  			rbuf = ring->buffer;
> >
> >diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> >index 9c24424..51ae5c1 100644
> >--- a/drivers/gpu/drm/i915/i915_guc_submission.c
> >+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> >@@ -964,7 +964,7 @@ int i915_guc_submission_enable(struct drm_device *dev)
> >  {
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	struct intel_guc *guc = &dev_priv->guc;
> >-	struct intel_context *ctx = dev_priv->ring[RCS].default_context;
> >+	struct intel_context *ctx = dev_priv->kernel_context;
> >  	struct i915_guc_client *client;
> >
> >  	/* client for execbuf submission */
> >@@ -1021,7 +1021,7 @@ int intel_guc_suspend(struct drm_device *dev)
> >  	if (!i915.enable_guc_submission)
> >  		return 0;
> >
> >-	ctx = dev_priv->ring[RCS].default_context;
> >+	ctx = dev_priv->kernel_context;
> >
> >  	data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
> >  	/* any value greater than GUC_POWER_D0 */
> >@@ -1047,7 +1047,7 @@ int intel_guc_resume(struct drm_device *dev)
> >  	if (!i915.enable_guc_submission)
> >  		return 0;
> >
> >-	ctx = dev_priv->ring[RCS].default_context;
> >+	ctx = dev_priv->kernel_context;
> >
> >  	data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
> >  	data[1] = GUC_POWER_D0;
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >index 8b6542d..aaaa5a3 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.c
> >+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >@@ -571,7 +571,7 @@ static int execlists_context_queue(struct drm_i915_gem_request *request)
> >  	struct drm_i915_gem_request *cursor;
> >  	int num_elements = 0;
> >
> >-	if (request->ctx != ring->default_context)
> >+	if (request->ctx != request->i915->kernel_context)
> >  		intel_lr_context_pin(request);
> >
> >  	i915_gem_request_reference(request);
> >@@ -664,7 +664,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
> >
> >  	request->ringbuf = request->ctx->engine[request->ring->id].ringbuf;
> >
> >-	if (request->ctx != request->ring->default_context) {
> >+	if (request->ctx != request->i915->kernel_context) {
> >  		ret = intel_lr_context_pin(request);
> >  		if (ret)
> >  			return ret;
> >@@ -980,7 +980,7 @@ void intel_execlists_retire_requests(struct intel_engine_cs *ring)
> >  		struct drm_i915_gem_object *ctx_obj =
> >  				ctx->engine[ring->id].state;
> >
> >-		if (ctx_obj && (ctx != ring->default_context))
> >+		if (ctx_obj && (ctx != req->i915->kernel_context))
> >  			intel_lr_context_unpin(req);
> >  		list_del(&req->execlist_link);
> >  		i915_gem_request_unreference(req);
> >@@ -1487,7 +1487,7 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring)
> >  	u8 next_context_status_buffer_hw;
> >
> >  	lrc_setup_hardware_status_page(ring,
> >-				ring->default_context->engine[ring->id].state);
> >+				dev_priv->kernel_context->engine[ring->id].state);
> >
> >  	I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
> >  	I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);
> >@@ -1929,6 +1929,9 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
> >
> >  static int logical_ring_init(struct drm_device *dev, struct intel_engine_cs *ring)
> >  {
> >+	struct drm_i915_private *dev_priv = to_i915(dev);
> >+	struct intel_context *dctx = dev_priv->kernel_context;
> >+	int ring_id = ring->id;
> >  	int ret;
> >
> >  	/* Intentionally left blank. */
> >@@ -1949,15 +1952,14 @@ static int logical_ring_init(struct drm_device *dev, struct intel_engine_cs *rin
> >  	if (ret)
> >  		goto error;
> >
> >-	ret = intel_lr_context_deferred_alloc(ring->default_context, ring);
> >+	ret = intel_lr_context_deferred_alloc(dctx, ring);
> >  	if (ret)
> >  		goto error;
> >
> >  	/* As this is the default context, always pin it */
> >-	ret = intel_lr_context_do_pin(
> >-			ring,
> >-			ring->default_context->engine[ring->id].state,
> >-			ring->default_context->engine[ring->id].ringbuf);
> >+	ret = intel_lr_context_do_pin(ring,
> >+				      dctx->engine[ring_id].state,
> >+				      dctx->engine[ring_id].ringbuf);
> >  	if (ret) {
> >  		DRM_ERROR(
> >  			"Failed to pin and map ringbuffer %s: %d\n",
> >@@ -2388,7 +2390,7 @@ void intel_lr_context_free(struct intel_context *ctx)
> >  					ctx->engine[i].ringbuf;
> >  			struct intel_engine_cs *ring = ringbuf->ring;
> >
> >-			if (ctx == ring->default_context) {
> >+			if (ctx == ctx->i915->kernel_context) {
> >  				intel_unpin_ringbuffer_obj(ringbuf);
> >  				i915_gem_object_ggtt_unpin(ctx_obj);
> >  			}
> >@@ -2507,7 +2509,7 @@ int intel_lr_context_deferred_alloc(struct intel_context *ctx,
> >  	ctx->engine[ring->id].ringbuf = ringbuf;
> >  	ctx->engine[ring->id].state = ctx_obj;
> >
> >-	if (ctx != ring->default_context && ring->init_context) {
> >+	if (ctx != ctx->i915->kernel_context && ring->init_context) {
> >  		struct drm_i915_gem_request *req;
> >
> >  		req = i915_gem_request_alloc(ring, ctx);
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >index 49574ff..e950f6c 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >@@ -305,7 +305,6 @@ struct  intel_engine_cs {
> >
> >  	wait_queue_head_t irq_queue;
> >
> >-	struct intel_context *default_context;
> >  	struct intel_context *last_context;
> >
> >  	struct intel_ring_hangcheck hangcheck;
> >
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


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