[Intel-gfx] [RFC 11/22] drm/i915/slpc: Send reset event

[tom.orourke at intel.com]

From: Tom O'Rourke <Tom.O'Rourke at intel.com>

Add host2guc SLPC reset event and send reset event
during enable.

Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>
---
 drivers/gpu/drm/i915/intel_slpc.c | 30 +++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/intel_slpc.h | 14 ++++++++++++++
 2 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c
index d956ac2..59c54a6 100644
--- a/drivers/gpu/drm/i915/intel_slpc.c
+++ b/drivers/gpu/drm/i915/intel_slpc.c
@@ -26,6 +26,30 @@
 #include "i915_drv.h"
 #include "intel_guc.h"
 
+static int host2guc_slpc_reset(struct drm_i915_private *dev_priv)
+{
+	struct drm_i915_gem_object *obj = dev_priv->guc.slpc.shared_data_obj;
+	u32 data[4];
+	int ret;
+	u64 shared_data_gtt_offset = i915_gem_obj_ggtt_offset(obj);
+
+	data[0] = HOST2GUC_ACTION_SLPC_REQUEST;
+	data[1] = SLPC_EVENT(SLPC_EVENT_RESET, 2);
+	data[2] = lower_32_bits(shared_data_gtt_offset);
+	data[3] = upper_32_bits(shared_data_gtt_offset);
+
+	WARN_ON(0 != data[3]);
+
+	ret = host2guc_action(&dev_priv->guc, data, 4);
+
+	if (0 == ret) {
+		ret = I915_READ(SOFT_SCRATCH(1));
+		ret &= 0xFF;
+	}
+
+	return ret;
+}
+
 static u8 slpc_get_platform_sku(struct drm_i915_gem_object *obj)
 {
 	struct drm_device *dev = obj->base.dev;
@@ -148,8 +172,12 @@ int intel_slpc_disable(struct drm_device *dev)
 int intel_slpc_enable(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
+	int ret = 0;
 
-	return 0;
+	if (dev_priv->guc.slpc.shared_data_obj)
+		ret = host2guc_slpc_reset(dev_priv);
+
+	return ret;
 }
 
 int intel_slpc_reset(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h
index dceef7e..7287c65 100644
--- a/drivers/gpu/drm/i915/intel_slpc.h
+++ b/drivers/gpu/drm/i915/intel_slpc.h
@@ -28,6 +28,20 @@
 #define SLPC_MINOR_VER 3
 #define SLPC_VERSION ((2015 << 16) | (SLPC_MAJOR_VER << 8) | (SLPC_MINOR_VER))
 
+
+enum slpc_event_id {
+	SLPC_EVENT_RESET = 0,
+	SLPC_EVENT_SHUTDOWN = 1,
+	SLPC_EVENT_PLATFORM_INFO_CHANGE = 2,
+	SLPC_EVENT_DISPLAY_MODE_CHANGE = 3,
+	SLPC_EVENT_FLIP_COMPLETE = 4,
+	SLPC_EVENT_QUERY_TASK_STATE = 5,
+	SLPC_EVENT_PARAMETER_SET = 6,
+	SLPC_EVENT_PARAMETER_UNSET = 7,
+};
+
+#define SLPC_EVENT(id, argc) ((u32) (id) << 8 | (argc))
+
 enum slpc_global_state {
 	SLPC_GLOBAL_STATE_NOT_RUNNING = 0,
 	SLPC_GLOBAL_STATE_INITIALIZING = 1,
-- 
1.9.1