[Intel-gfx] [PATCH 5/8] drm/i915/bxt: Add GEN8_L3SQCREG4 to HW whitelist
Nick Hoath
nicholas.hoath at intel.com
Thu Jan 21 04:14:18 PST 2016
On 13/01/2016 10:06, Arun Siluvery wrote:
> Required for WaDisableLSQCROPERFforOCL:bxt
>
> According to WA database these are only applicable for BXT:A0 but since
> A0 and A1 shares the same GT these are extended for A1 as well.
>
> Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath at intel.com>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 7a46cf1..5eb4eea 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1135,10 +1135,15 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
> /* WaDisableObjectLevelPreemptionForTrifanOrPolygon:bxt */
> /* WaDisableObjectLevelPreemptionForInstancedDraw:bxt */
> /* WaDisableObjectLevelPreemtionForInstanceId:bxt */
> + /* WaDisableLSQCROPERFforOCL:bxt */
> if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
> ret = wa_ring_whitelist_reg(ring, GEN9_CS_DEBUG_MODE1);
> if (ret)
> return ret;
> +
> + ret = wa_ring_whitelist_reg(ring, GEN8_L3SQCREG4);
> + if (ret)
> + return ret;
> }
>
> return 0;
>
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