[Intel-gfx] [PATCH v3 0/8] Gen9 HW whitelist and Preemption WA patches

[Arun Siluvery]

Some comments from Chris to improve commit message, no functional changes.
All of them are reviewed and so have r-b tags.

previous version,
http://www.spinics.net/lists/intel-gfx/msg85969.html

Arun Siluvery (8):
  drm/i915/gen9: Add framework to whitelist specific GPU registers
  drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist
  drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist
  drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelist
  drm/i915/bxt: Add GEN8_L3SQCREG4 to HW whitelist
  drm/i915/skl: Add GEN8_L3SQCREG4 to HW whitelist
  drm/i915/skl: Enable Per context Preemption granularity control
  drm/i915/gen9: Add WaOCLCoherentLineFlush

 drivers/gpu/drm/i915/i915_debugfs.c     | 15 +++++---
 drivers/gpu/drm/i915/i915_drv.h         |  9 ++++-
 drivers/gpu/drm/i915/i915_reg.h         | 11 ++++++
 drivers/gpu/drm/i915/intel_ringbuffer.c | 61 +++++++++++++++++++++++++++++++++
 4 files changed, 90 insertions(+), 6 deletions(-)

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1.9.1