[Intel-gfx] [PATCH 02/20] drm/i915: Generalise common GPU engine reset request/unrequest code

[Mika Kuoppala]

Arun Siluvery <arun.siluvery at linux.intel.com> writes:

> From: Tomas Elf <tomas.elf at intel.com>
>
> GPU engine reset handshaking is something that is applicable to both full GPU
> reset and engine reset, which is something that is part of the upcoming TDR
> per-engine hang recovery patches. Break out the common engine reset
> request/unrequest code (originally written by Mika Kuoppala) for reuse later in
> the TDR enablement patch series.
>
> Signed-off-by: Tomas Elf <tomas.elf at intel.com>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 46 ++++++++++++++++++++++++++-----------
>  1 file changed, 32 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index c3c13dc..2df4246 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1529,32 +1529,50 @@ static int wait_for_register(struct drm_i915_private *dev_priv,
>  	return wait_for((I915_READ(reg) & mask) == value, timeout_ms);
>  }
>  
> +static inline int gen8_request_engine_reset(struct intel_engine_cs *engine)
> +{

Inline is superfluous here. Please remove.

> +	struct drm_i915_private *dev_priv = engine->dev->dev_private;
> +	int ret = 0;

No need to set ret to zero.

> +
> +	I915_WRITE(RING_RESET_CTL(engine->mmio_base),
> +		   _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET));
> +

Indentation seems to be bit off here..

> +	ret = wait_for_register(dev_priv,
> +			      RING_RESET_CTL(engine->mmio_base),
> +			      RESET_CTL_READY_TO_RESET,
> +			      RESET_CTL_READY_TO_RESET,
> +			      700);

and here 

> +	if (ret)
> +		DRM_ERROR("%s: reset request timeout\n", engine->name);
> +
> +	return ret;
> +}
> +
> +static inline int gen8_unrequest_engine_reset(struct intel_engine_cs
> *engine)

Remove inline and do not return value if there
is no use for it.

> +{
> +	struct drm_i915_private *dev_priv = engine->dev->dev_private;
> +
> +	I915_WRITE(RING_RESET_CTL(engine->mmio_base),
> +		_MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET));
> +
indent.

With these done, you can add my r-b.

-Mika

> +	return 0;
> +}
> +
>  static int gen8_do_reset(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_engine_cs *engine;
>  	int i;
>  
> -	for_each_ring(engine, dev_priv, i) {
> -		I915_WRITE(RING_RESET_CTL(engine->mmio_base),
> -			   _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET));
> -
> -		if (wait_for_register(dev_priv,
> -				      RING_RESET_CTL(engine->mmio_base),
> -				      RESET_CTL_READY_TO_RESET,
> -				      RESET_CTL_READY_TO_RESET,
> -				      700)) {
> -			DRM_ERROR("%s: reset request timeout\n", engine->name);
> +	for_each_ring(engine, dev_priv, i)
> +		if (gen8_request_engine_reset(engine))
>  			goto not_ready;
> -		}
> -	}
>  
>  	return gen6_do_reset(dev);
>  
>  not_ready:
>  	for_each_ring(engine, dev_priv, i)
> -		I915_WRITE(RING_RESET_CTL(engine->mmio_base),
> -			   _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET));
> +		gen8_unrequest_engine_reset(engine);
>  
>  	return -EIO;
>  }
> -- 
> 1.9.1