[Intel-gfx] [PATCH i-g-t 1/2 v2] lib/ioctl_wrappers: Add gem_gtt_type exposing raw HAS_ALIASING_PPGTT param
Daniel Vetter
daniel at ffwll.ch
Mon Jan 25 08:35:04 PST 2016
On Thu, Jan 21, 2016 at 10:27:26AM +0100, Michał Winiarski wrote:
> No functional changes.
> While I'm here, let's also rename gem_uses_aliasing_ppgtt (since it's
> being used to indicate if we are using ANY kind of ppgtt) and introduce
> gem_uses_full_ppgtt to drop some unnecessary code from tests that were
> previously calling getparam directly instead of using ioctl wrapper.
>
> v2: drop gem_uses_full_48b_ppgtt since it's no longer used anywhere,
> s/48b/64b (Chris)
>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Michał Winiarski <michal.winiarski at intel.com>
Looks like this needs to be rebased to not break gem_softpin.c. And patch
2/2 doesn't apply cleanly any more, so please resend the entire series.
Thanks, Daniel
> ---
> lib/ioctl_wrappers.c | 45 +++++++++++++++++++++++++++++++++-------
> lib/ioctl_wrappers.h | 4 +++-
> tests/drv_hangman.c | 2 +-
> tests/gem_bad_reloc.c | 11 +---------
> tests/gem_ctx_thrash.c | 20 ++----------------
> tests/gem_exec_parse.c | 2 +-
> tests/gem_ppgtt.c | 20 ++----------------
> tests/gem_storedw_batches_loop.c | 2 +-
> tests/gem_storedw_loop.c | 2 +-
> tests/pm_rps.c | 2 +-
> tests/pm_sseu.c | 2 +-
> 11 files changed, 51 insertions(+), 61 deletions(-)
>
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index 0024898..b534b03 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -924,18 +924,18 @@ bool gem_bo_busy(int fd, uint32_t handle)
> /* feature test helpers */
>
> /**
> - * gem_uses_aliasing_ppgtt:
> + * gem_gtt_type:
> * @fd: open i915 drm file descriptor
> *
> - * Feature test macro to check whether the kernel internally uses ppgtt to
> - * execute batches. The /aliasing/ in the function name is a bit a misnomer,
> - * this driver parameter is also true when full ppgtt address spaces are
> - * available since for batchbuffer construction only ppgtt or global gtt is
> - * relevant.
> + * Feature test macro to check what type of gtt is being used by the kernel:
> + * 0 - global gtt
> + * 1 - aliasing ppgtt
> + * 2 - full ppgtt, limited to 32bit address space
> + * 3 - full ppgtt, 64bit address space
> *
> - * Returns: Whether batches are run through ppgtt.
> + * Returns: Type of gtt being used.
> */
> -bool gem_uses_aliasing_ppgtt(int fd)
> +int gem_gtt_type(int fd)
> {
> struct drm_i915_getparam gp;
> int val = 0;
> @@ -952,6 +952,35 @@ bool gem_uses_aliasing_ppgtt(int fd)
> }
>
> /**
> + * gem_uses_ppgtt:
> + * @fd: open i915 drm file descriptor
> + *
> + * Feature test macro to check whether the kernel internally uses ppgtt to
> + * execute batches. Note that this is also true when we're using full ppgtt.
> + *
> + * Returns: Whether batches are run through ppgtt.
> + */
> +bool gem_uses_ppgtt(int fd)
> +{
> + return gem_gtt_type(fd) > 0;
> +}
> +
> +/**
> + * gem_uses_full_ppgtt:
> + * @fd: open i915 drm file descriptor
> + *
> + * Feature test macro to check whether the kernel internally uses full
> + * per-process gtt to execute batches. Note that this is also true when we're
> + * using full 64b ppgtt.
> + *
> + * Returns: Whether batches are run through full ppgtt.
> + */
> +bool gem_uses_full_ppgtt(int fd)
> +{
> + return gem_gtt_type(fd) > 1;
> +}
> +
> +/**
> * gem_available_fences:
> * @fd: open i915 drm file descriptor
> *
> diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
> index 214ec78..a6bf700 100644
> --- a/lib/ioctl_wrappers.h
> +++ b/lib/ioctl_wrappers.h
> @@ -125,7 +125,9 @@ bool gem_has_bsd(int fd);
> bool gem_has_blt(int fd);
> bool gem_has_vebox(int fd);
> bool gem_has_bsd2(int fd);
> -bool gem_uses_aliasing_ppgtt(int fd);
> +int gem_gtt_type(int fd);
> +bool gem_uses_ppgtt(int fd);
> +bool gem_uses_full_ppgtt(int fd);
> int gem_available_fences(int fd);
> uint64_t gem_available_aperture_size(int fd);
> uint64_t gem_aperture_size(int fd);
> diff --git a/tests/drv_hangman.c b/tests/drv_hangman.c
> index cd63b97..1498ddf 100644
> --- a/tests/drv_hangman.c
> +++ b/tests/drv_hangman.c
> @@ -358,7 +358,7 @@ static bool uses_cmd_parser(int fd, int gen)
> if (rc || parser_version == 0)
> return false;
>
> - if (!gem_uses_aliasing_ppgtt(fd))
> + if (!gem_uses_ppgtt(fd))
> return false;
>
> if (gen != 7)
> diff --git a/tests/gem_bad_reloc.c b/tests/gem_bad_reloc.c
> index e8701da..a9146e2 100644
> --- a/tests/gem_bad_reloc.c
> +++ b/tests/gem_bad_reloc.c
> @@ -46,16 +46,7 @@ IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
>
> static uint64_t get_page_table_size(int fd)
> {
> - struct drm_i915_getparam gp;
> - int val = 0;
> -
> - memset(&gp, 0, sizeof(gp));
> - gp.param = 18; /* HAS_ALIASING_PPGTT */
> - gp.value = &val;
> -
> - if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
> - return 0;
> - errno = 0;
> + int val = gem_gtt_type(fd);
>
> switch (val) {
> case 0:
> diff --git a/tests/gem_ctx_thrash.c b/tests/gem_ctx_thrash.c
> index acfa8f5..ff752b7 100644
> --- a/tests/gem_ctx_thrash.c
> +++ b/tests/gem_ctx_thrash.c
> @@ -117,22 +117,6 @@ static void *thread(void *bufmgr)
> return NULL;
> }
>
> -static int uses_ppgtt(int _fd)
> -{
> - struct drm_i915_getparam gp;
> - int val = 0;
> -
> - memset(&gp, 0, sizeof(gp));
> - gp.param = 18; /* HAS_ALIASING_PPGTT */
> - gp.value = &val;
> -
> - if (drmIoctl(_fd, DRM_IOCTL_I915_GETPARAM, &gp))
> - return 0;
> -
> - errno = 0;
> - return val;
> -}
> -
> static void
> processes(void)
> {
> @@ -150,7 +134,7 @@ processes(void)
> devid = intel_get_drm_devid(fd);
> aperture = gem_aperture_size(fd);
>
> - ppgtt_mode = uses_ppgtt(fd);
> + ppgtt_mode = gem_gtt_type(fd);
> igt_require(ppgtt_mode);
>
> render_copy = igt_get_render_copyfunc(devid);
> @@ -252,7 +236,7 @@ threads(void)
> devid = intel_get_drm_devid(fd);
> aperture = gem_aperture_size(fd);
>
> - ppgtt_mode = uses_ppgtt(fd);
> + ppgtt_mode = gem_gtt_type(fd);
> igt_require(ppgtt_mode);
>
> render_copy = igt_get_render_copyfunc(devid);
> diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
> index f7e7c86..77903ab 100644
> --- a/tests/gem_exec_parse.c
> +++ b/tests/gem_exec_parse.c
> @@ -306,7 +306,7 @@ igt_main
> rc = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> igt_require(!rc && parser_version > 0);
>
> - igt_require(gem_uses_aliasing_ppgtt(fd));
> + igt_require(gem_uses_ppgtt(fd));
>
> handle = gem_create(fd, 4096);
>
> diff --git a/tests/gem_ppgtt.c b/tests/gem_ppgtt.c
> index 1cc69ed..78d5b48 100644
> --- a/tests/gem_ppgtt.c
> +++ b/tests/gem_ppgtt.c
> @@ -44,22 +44,6 @@
> #define HEIGHT 512
> #define SIZE (HEIGHT*STRIDE)
>
> -static bool uses_full_ppgtt(int fd)
> -{
> - struct drm_i915_getparam gp;
> - int val = 0;
> -
> - memset(&gp, 0, sizeof(gp));
> - gp.param = 18; /* HAS_ALIASING_PPGTT */
> - gp.value = &val;
> -
> - if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
> - return 0;
> -
> - errno = 0;
> - return val > 1;
> -}
> -
> static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr,
> uint32_t pixel)
> {
> @@ -240,7 +224,7 @@ static void flink_and_close(void)
> uint64_t offset, offset_new;
>
> fd = drm_open_driver(DRIVER_INTEL);
> - igt_require(uses_full_ppgtt(fd));
> + igt_require(gem_uses_full_ppgtt(fd));
>
> bo = gem_create(fd, 4096);
> name = gem_flink(fd, bo);
> @@ -277,7 +261,7 @@ static void flink_and_exit(void)
> const int retries = 50;
>
> fd = drm_open_driver(DRIVER_INTEL);
> - igt_require(uses_full_ppgtt(fd));
> + igt_require(gem_uses_full_ppgtt(fd));
>
> bo = gem_create(fd, 4096);
> name = gem_flink(fd, bo);
> diff --git a/tests/gem_storedw_batches_loop.c b/tests/gem_storedw_batches_loop.c
> index 29080d8..4b0249a 100644
> --- a/tests/gem_storedw_batches_loop.c
> +++ b/tests/gem_storedw_batches_loop.c
> @@ -136,7 +136,7 @@ igt_main
> fd = drm_open_driver(DRIVER_INTEL);
> devid = intel_get_drm_devid(fd);
>
> - has_ppgtt = gem_uses_aliasing_ppgtt(fd);
> + has_ppgtt = gem_uses_ppgtt(fd);
>
> /* storedw needs gtt address on gen4+/g33 and snoopable memory.
> * Strictly speaking we could implement this now ... */
> diff --git a/tests/gem_storedw_loop.c b/tests/gem_storedw_loop.c
> index 9727b97..9bb06f3 100644
> --- a/tests/gem_storedw_loop.c
> +++ b/tests/gem_storedw_loop.c
> @@ -189,7 +189,7 @@ igt_main
> "needs snoopable mem on pre-gen6\n");
>
> /* This only works with ppgtt */
> - igt_require(gem_uses_aliasing_ppgtt(fd));
> + igt_require(gem_uses_ppgtt(fd));
> }
>
> for (i = 0; i < ARRAY_SIZE(rings); i++) {
> diff --git a/tests/pm_rps.c b/tests/pm_rps.c
> index 9f752f8..72e47e7 100644
> --- a/tests/pm_rps.c
> +++ b/tests/pm_rps.c
> @@ -288,7 +288,7 @@ static void load_helper_stop(void)
> static void load_helper_init(void)
> {
> lh.devid = intel_get_drm_devid(drm_fd);
> - lh.has_ppgtt = gem_uses_aliasing_ppgtt(drm_fd);
> + lh.has_ppgtt = gem_uses_ppgtt(drm_fd);
>
> /* MI_STORE_DATA can only use GTT address on gen4+/g33 and needs
> * snoopable mem on pre-gen6. Hence load-helper only works on gen6+, but
> diff --git a/tests/pm_sseu.c b/tests/pm_sseu.c
> index 6956e2a..3e60a5f 100644
> --- a/tests/pm_sseu.c
> +++ b/tests/pm_sseu.c
> @@ -258,7 +258,7 @@ gem_init(void)
> gem.gen = intel_gen(gem.devid);
> igt_require_f(gem.gen >= 8,
> "SSEU power gating only relevant for Gen8+");
> - gem.has_ppgtt = gem_uses_aliasing_ppgtt(gem.drm_fd);
> + gem.has_ppgtt = gem_uses_ppgtt(gem.drm_fd);
>
> gem.bufmgr = drm_intel_bufmgr_gem_init(gem.drm_fd, 4096);
> igt_assert(gem.bufmgr);
> --
> 2.5.0
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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