[Intel-gfx] [PATCH 13/14] drm/i915: Add stats for GuC log buffer flush interrupts
akash.goel at intel.com
akash.goel at intel.com
Sat Jul 2 18:51:30 UTC 2016
From: Akash Goel <akash.goel at intel.com>
GuC firmware sends an interrupt to flush the log buffer when it
becomes half full. GuC firmware also tracks how many times the
buffer overflowed.
It would be useful to maintain a statistics of how many flush
interrupts were received and for which type of log buffer,
along with the overflow count of each buffer type.
Augmented i915_log_info debugfs to report back these statistics.
Signed-off-by: Akash Goel <akash.goel at intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 26 ++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_guc_submission.c | 3 +++
drivers/gpu/drm/i915/i915_irq.c | 1 +
drivers/gpu/drm/i915/intel_guc.h | 5 +++++
4 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 16aeab2..857ce9d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2542,6 +2542,30 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data)
return 0;
}
+static void i915_guc_log_info(struct seq_file *m,
+ struct drm_i915_private *dev_priv)
+{
+ struct intel_guc *guc = &dev_priv->guc;
+
+ seq_printf(m, "\nGuC logging stats:\n");
+
+ seq_printf(m, "\tISR: flush count %10u, overflow count %8u\n",
+ guc->log.flush_count[GUC_ISR_LOG_BUFFER],
+ guc->log.overflow_count[GUC_ISR_LOG_BUFFER]);
+
+ seq_printf(m, "\tDPC: flush count %10u, overflow count %8u\n",
+ guc->log.flush_count[GUC_DPC_LOG_BUFFER],
+ guc->log.overflow_count[GUC_DPC_LOG_BUFFER]);
+
+ seq_printf(m, "\tCRASH: flush count %10u, overflow count %8u\n",
+ guc->log.flush_count[GUC_CRASH_DUMP_LOG_BUFFER],
+ guc->log.overflow_count[GUC_CRASH_DUMP_LOG_BUFFER]);
+
+ seq_printf(m, "\tTotal flush interrupt count: %u\n",
+ guc->log.flush_interrupt_count);
+
+}
+
static void i915_guc_client_info(struct seq_file *m,
struct drm_i915_private *dev_priv,
struct i915_guc_client *client)
@@ -2615,6 +2639,8 @@ static int i915_guc_info(struct seq_file *m, void *data)
seq_printf(m, "\nGuC execbuf client @ %p:\n", guc.execbuf_client);
i915_guc_client_info(m, dev_priv, &client);
+ i915_guc_log_info(m, dev_priv);
+
/* Add more as required ... */
return 0;
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index d20df8d..2a192d4 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -907,6 +907,9 @@ static void guc_read_update_log_buffer(struct drm_device *dev, bool capture_all)
log_buffer_copy_state++;
}
+ guc->log.overflow_count[i] = log_buffer_state->buffer_full_cnt;
+ guc->log.flush_count[i] += log_buffer_state->flush_to_file;
+
/* Update the read pointer in the shared log buffer */
log_buffer_state->read_ptr =
log_buffer_state->sampled_write_ptr;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f1cf36e..e2cbe1e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1743,6 +1743,7 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir)
queue_work(dev_priv->guc.log.wq,
&dev_priv->guc.events_work);
}
+ dev_priv->guc.log.flush_interrupt_count++;
spin_unlock(&dev_priv->irq_lock);
}
}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 7cefd81..bd299d3 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -128,6 +128,11 @@ struct intel_guc_log {
struct workqueue_struct *wq;
struct rchan *relay_chan;
void *buf_addr;
+
+ /* logging related stats */
+ u32 flush_interrupt_count;
+ u32 overflow_count[GUC_MAX_LOG_BUFFER];
+ u32 flush_count[GUC_MAX_LOG_BUFFER];
};
struct intel_guc {
--
1.9.2
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