[Intel-gfx] [PATCH v6 10/10] drm/i915: Add DP branch device info on debugfs

[Mika Kahola]

Read DisplayPort branch device info from through debugfs
interface.

v2: use drm_dp_helper routines to collect data
v3: cleanup to match the drm_dp_helper.c patches introduced
    earlier in this series
v4: move DP branch device info to function 'intel_dp_branch_device_info()'

Signed-off-by: Mika Kahola <mika.kahola at intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 75 +++++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 9989b6a..7f57b3c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2942,16 +2942,91 @@ static void intel_panel_info(struct seq_file *m, struct intel_panel *panel)
 	intel_seq_print_mode(m, 2, mode);
 }
 
+static void intel_dp_branch_device_info(struct seq_file *m, struct intel_dp *intel_dp)
+{
+	struct drm_dp_revision rev;
+	bool detailed_cap_info = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+		DP_DETAILED_CAP_INFO_AVAILABLE;
+	int type;
+	int clk;
+	int bpc;
+	char id[6];
+
+	type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
+
+	switch (type) {
+	case DP_DS_PORT_TYPE_DP:
+		seq_printf(m, "\ttype: DisplayPort\n");
+		break;
+	case DP_DS_PORT_TYPE_VGA:
+		seq_printf(m, "\ttype: VGA\n");
+		break;
+	case DP_DS_PORT_TYPE_DVI:
+		seq_printf(m, "\ttype: DVI\n");
+		break;
+	case DP_DS_PORT_TYPE_HDMI:
+		seq_printf(m, "\ttype: HDMI\n");
+		break;
+	case DP_DS_PORT_TYPE_NON_EDID:
+		seq_printf(m, "\ttype: others without EDID support\n");
+		break;
+	case DP_DS_PORT_TYPE_DP_DUALMODE:
+		seq_printf(m, "\ttype: DP++\n");
+		break;
+	case DP_DS_PORT_TYPE_WIRELESS:
+		seq_printf(m, "\ttype: Wireless\n");
+		break;
+	default:
+		seq_printf(m, "\ttype: N/A\n");
+	}
+
+	drm_dp_downstream_id(&intel_dp->aux, id);
+	seq_printf(m, "\tDevice id: %s\n", id);
+
+	rev = drm_dp_downstream_hw_rev(&intel_dp->aux);
+	seq_printf(m, "\tHW revision: %.2d.%.2d\n", rev.major, rev.minor);
+
+	rev = drm_dp_downstream_sw_rev(&intel_dp->aux);
+	seq_printf(m, "\tSW revision: %.2d.%.2d\n", rev.major, rev.minor);
+
+	if (detailed_cap_info) {
+		clk = drm_dp_downstream_max_clock(intel_dp->dpcd,
+						  intel_dp->downstream_ports);
+
+		if (clk > 0) {
+			if (type == DP_DS_PORT_TYPE_VGA)
+				seq_printf(m, "\tMax dot clock: %d kHz\n", clk);
+			else
+				seq_printf(m, "\tMax TMDS clock: %d kHz\n", clk);
+		}
+
+		bpc = drm_dp_downstream_max_bpc(intel_dp->dpcd,
+						intel_dp->downstream_ports);
+
+		if (bpc > 0)
+			seq_printf(m, "\tMax bpc: %d\n", bpc);
+	}
+}
+
 static void intel_dp_info(struct seq_file *m,
 			  struct intel_connector *intel_connector)
 {
 	struct intel_encoder *intel_encoder = intel_connector->encoder;
 	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);
+	bool is_branch_device;
 
 	seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
 	seq_printf(m, "\taudio support: %s\n", yesno(intel_dp->has_audio));
+
 	if (intel_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
 		intel_panel_info(m, &intel_connector->panel);
+
+	is_branch_device = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+		DP_DWN_STRM_PORT_PRESENT;
+	seq_printf(m, "\tbranch device: %s\n", yesno(is_branch_device));
+
+	if (is_branch_device)
+		intel_dp_branch_device_info(m, intel_dp);
 }
 
 static void intel_hdmi_info(struct seq_file *m,
-- 
1.9.1