[Intel-gfx] [PATCH 5/5] drm/i915: Simplify intel_init_ring_buffer prototype
Daniel Vetter
daniel at ffwll.ch
Wed Jul 13 12:30:58 UTC 2016
On Fri, Jul 01, 2016 at 05:47:15PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>
> Engine contains dev_priv so need to pass it in.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 18 ++++++++----------
> 1 file changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 964776bb181c..760c6b53f063 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2376,21 +2376,19 @@ static void intel_ring_context_unpin(struct i915_gem_context *ctx,
> i915_gem_context_unreference(ctx);
> }
>
> -static int intel_init_ring_buffer(struct drm_device *dev,
> - struct intel_engine_cs *engine)
> +static int intel_init_ring_buffer(struct intel_engine_cs *engine)
> {
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = engine->i915;
> struct intel_ringbuffer *ringbuf;
> int ret;
>
> WARN_ON(engine->buffer);
>
> - engine->i915 = dev_priv;
> INIT_LIST_HEAD(&engine->active_list);
> INIT_LIST_HEAD(&engine->request_list);
> INIT_LIST_HEAD(&engine->execlist_queue);
> INIT_LIST_HEAD(&engine->buffers);
> - i915_gem_batch_pool_init(dev, &engine->batch_pool);
> + i915_gem_batch_pool_init(dev_priv->dev, &engine->batch_pool);
> memset(engine->semaphore.sync_seqno, 0,
> sizeof(engine->semaphore.sync_seqno));
>
> @@ -3097,7 +3095,7 @@ int intel_init_render_ring_buffer(struct intel_engine_cs *engine)
> engine->scratch.gtt_offset = i915_gem_obj_ggtt_offset(obj);
> }
>
> - ret = intel_init_ring_buffer(dev_priv->dev, engine);
> + ret = intel_init_ring_buffer(engine);
> if (ret)
> return ret;
>
> @@ -3133,7 +3131,7 @@ int intel_init_bsd_ring_buffer(struct intel_engine_cs *engine)
> engine->irq_enable_mask = I915_BSD_USER_INTERRUPT;
> }
>
> - return intel_init_ring_buffer(dev_priv->dev, engine);
> + return intel_init_ring_buffer(engine);
> }
>
> /**
> @@ -3148,7 +3146,7 @@ int intel_init_bsd2_ring_buffer(struct intel_engine_cs *engine)
>
> engine->flush = gen6_bsd_ring_flush;
>
> - return intel_init_ring_buffer(dev_priv->dev, engine);
> + return intel_init_ring_buffer(engine);
> }
>
> int intel_init_blt_ring_buffer(struct intel_engine_cs *engine)
> @@ -3162,7 +3160,7 @@ int intel_init_blt_ring_buffer(struct intel_engine_cs *engine)
> if (INTEL_GEN(dev_priv) < 8)
> engine->irq_enable_mask = GT_BLT_USER_INTERRUPT;
>
> - return intel_init_ring_buffer(dev_priv->dev, engine);
> + return intel_init_ring_buffer(engine);
> }
>
> int intel_init_vebox_ring_buffer(struct intel_engine_cs *engine)
> @@ -3180,7 +3178,7 @@ int intel_init_vebox_ring_buffer(struct intel_engine_cs *engine)
> engine->irq_put = hsw_vebox_put_irq;
> }
>
> - return intel_init_ring_buffer(dev_priv->dev, engine);
> + return intel_init_ring_buffer(engine);
> }
>
> int
> --
> 1.9.1
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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