[Intel-gfx] [PATCH] drm/i915: Wait up to 3ms for the pcu to ack the cdclk change request on SKL

[Chris Wilson]

On Wed, Jul 13, 2016 at 04:32:03PM +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Bspec tells us to keep bashing the PCU for up to 3ms when trying to
> inform it about an upcoming change in the cdclk frequency. Currently
> we only keep at it for 15*10usec (+ whatever delays gets added by
> the sandybridge_pcode_read() itself). Let's change the limit to 3ms.
> 
> I decided to keep 10 usec delay per iteration for now, even though
> the spec doesn't really tell us to do that.
> 
> Cc: David Weinehall <david.weinehall at intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Code does what it says on the tin,
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Just slightly sadden to see a new _wait_for(), but with the 10us
interval this can be replaced with wait_for_us(..., 3000);
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre