[Intel-gfx] [PATCH 4/5] drm/i915/guc: add engine mask to GuC client & pass to GuC

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Tue Jul 19 15:06:22 UTC 2016


On 19/07/16 13:59, Dave Gordon wrote:
> The Context Descriptor passed by the kernel to the GuC contains a field
> specifying which engine(s) the context will use. Historically, this was
> always set to "all of them", but now that we have one client per engine,
> we can be more precise, and set only the single bit for the engine that
> the client is associated with.
>
> Signed-off-by: Dave Gordon <david.s.gordon at intel.com>
> ---
>   drivers/gpu/drm/i915/i915_guc_submission.c | 15 ++++++++++-----
>   drivers/gpu/drm/i915/intel_guc.h           |  3 ++-
>   2 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index b0f9945..4daba77 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -340,7 +340,7 @@ static void guc_init_ctx_desc(struct intel_guc *guc,
>   	desc.priority = client->priority;
>   	desc.db_id = client->doorbell_id;
>
> -	for_each_engine(engine, dev_priv) {
> +	for_each_engine_masked(engine, dev_priv, client->engines) {
>   		struct intel_context *ce = &ctx->engine[engine->id];
>   		struct guc_execlist_context *lrc = &desc.lrc[engine->guc_id];
>   		struct drm_i915_gem_object *obj;
> @@ -374,6 +374,8 @@ static void guc_init_ctx_desc(struct intel_guc *guc,
>   		desc.engines_used |= (1 << engine->guc_id);
>   	}
>
> +	DRM_DEBUG_DRIVER("Host engines 0x%x => GuC engines used 0x%x\n",
> +			client->engines, desc.engines_used);
>   	WARN_ON(desc.engines_used == 0);
>
>   	/*
> @@ -768,6 +770,7 @@ static void guc_init_doorbell_hw(struct intel_guc *guc)
>    */
>   static struct i915_guc_client *
>   guc_client_alloc(struct drm_i915_private *dev_priv,
> +		 uint32_t engines,
>   		 uint32_t priority,
>   		 struct i915_gem_context *ctx)
>   {
> @@ -780,10 +783,11 @@ static void guc_init_doorbell_hw(struct intel_guc *guc)
>   	if (!client)
>   		return NULL;
>
> -	client->doorbell_id = GUC_INVALID_DOORBELL_ID;
> -	client->priority = priority;
>   	client->owner = ctx;
>   	client->guc = guc;
> +	client->engines = engines;
> +	client->priority = priority;
> +	client->doorbell_id = GUC_INVALID_DOORBELL_ID;
>
>   	client->ctx_index = (uint32_t)ida_simple_get(&guc->ctx_ids, 0,
>   			GUC_MAX_GPU_CONTEXTS, GFP_KERNEL);
> @@ -825,8 +829,8 @@ static void guc_init_doorbell_hw(struct intel_guc *guc)
>   	if (guc_init_doorbell(guc, client, db_id))
>   		goto err;
>
> -	DRM_DEBUG_DRIVER("new priority %u client %p: ctx_index %u\n",
> -		priority, client, client->ctx_index);
> +	DRM_DEBUG_DRIVER("new priority %u client %p for engine(s) 0x%x: ctx_index %u\n",
> +		priority, client, client->engines, client->ctx_index);
>   	DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%x\n",
>   		client->doorbell_id, client->doorbell_offset);
>
> @@ -1011,6 +1015,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
>   	for_each_engine(engine, dev_priv) {
>   		/* client for execbuf submission */
>   		client = guc_client_alloc(dev_priv,
> +					  intel_engine_flag(engine),
>   					  GUC_CTX_PRIORITY_KMD_NORMAL,
>   					  dev_priv->kernel_context);
>   		if (!client) {
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index 7b4cc4d..53d41b5 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -67,6 +67,8 @@ struct i915_guc_client {
>   	void *client_base;		/* first page (only) of above	*/
>   	struct i915_gem_context *owner;
>   	struct intel_guc *guc;
> +
> +	uint32_t engines;		/* bitmap of (host) engine ids	*/
>   	uint32_t priority;
>   	uint32_t ctx_index;
>
> @@ -79,7 +81,6 @@ struct i915_guc_client {
>   	uint32_t wq_offset;
>   	uint32_t wq_size;
>   	uint32_t wq_tail;
> -	uint32_t unused;		/* Was 'wq_head'		*/
>
>   	uint32_t no_wq_space;
>   	uint32_t q_fail;		/* No longer used		*/
>

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko


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