[Intel-gfx] [PATCH 10/18] drm/i915: Unify legacy/execlists emission of MI_BATCHBUFFER_START

Chris Wilson chris at chris-wilson.co.uk
Thu Jul 21 14:14:50 UTC 2016


On Thu, Jul 21, 2016 at 04:39:58PM +0300, Joonas Lahtinen wrote:
> On ke, 2016-07-20 at 14:12 +0100, Chris Wilson wrote:
> >  	if (so.aux_batch_size > 8) {
> > -		ret = req->engine->dispatch_execbuffer(req,
> > -						     (so.ggtt_offset +
> > -						      so.aux_batch_offset),
> > -						     so.aux_batch_size,
> > -						     I915_DISPATCH_SECURE);
> > +		ret = req->engine->emit_bb_start(req,
> > +						 (so.ggtt_offset +
> > +						  so.aux_batch_offset),
> > +						 so.aux_batch_size,
> > +						 I915_DISPATCH_SECURE);
> >  		if (ret)
> >  			goto out;
> >  	}
> 
> The code above this line is exact reason why I don't like the a->b->c
> (especially when there is repetition). But it's not new to this patch
> so guess it'll do. Some future work to shorten down a little bit might
> not hurt.

I presume you mean req->engine->x here, not so.y. Is it just the depth
and saving 5 columns? Or something else?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


More information about the Intel-gfx mailing list