[Intel-gfx] [PATCH 07/22] drm/i915: Pad GTT views of exec objects up to user specified size

[Chris Wilson]

On Thu, Jul 28, 2016 at 11:55:21AM +0200, Daniel Vetter wrote:
> On Wed, Jul 27, 2016 at 12:14:45PM +0100, Chris Wilson wrote:
> > Our GPUs impose certain requirements upon buffers that depend upon how
> > exactly they are used. Typically this is expressed as that they require
> > a larger surface than would be naively computed by pitch * height.
> > Normally such requirements are hidden away in the userspace driver, but
> > when we accept pointers from strangers and later impose extra conditions
> > on them, the original client allocator has no idea about the
> > monstrosities in the GPU and we require the userspace driver to inform
> > the kernel how many padding pages are required beyond the client
> > allocation.
> > 
> > v2: Long time, no see
> > v3: Try an anonymous union for uapi struct compatibility
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> This is missing the testcase line. Also short link to the
> libva/opencl/whatever patches would be good too.

Yes, I am waiting on kernel support before merging to the ddx.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre