[Intel-gfx] [PATCH v6 9/9] drm/i915: Introduce GVT context creation API
Joonas Lahtinen
joonas.lahtinen at linux.intel.com
Fri Jun 3 09:59:02 UTC 2016
On to, 2016-06-02 at 12:36 -0400, Zhi Wang wrote:
> GVT workload scheduler needs special host LRC contexts, the so called
> "shadow LRC context" to submit guest workload to host i915. During the
> guest workload submission, GVT fills the shadow LRC context with the
> content of guest LRC context: engine context is copied without changes,
> ring context is mostly owned by host i915.
>
> The GVT-g workload scheduler flow:
>
> +-----------+ +-----------+
> | GVT Guest | | GVT Guest |
> +-+-----^---+ +-+-----^---+
> | | | |
> | | GVT-g | | GVT-g
> vELSP write| | emulates vELSP write| | emulates
> | | Execlist/CSB | | Execlist/CSB
> | | Status | | Status
> | | | |
> +------v-----+-------------------------v-----+---------+
> | GVT Virtual Execlist Submission |
> +------+-------------------------------+---------------+
> | |
> | Per-VM/Ring Workoad Q | Per-VM/Ring Workload Q
> +---------------------+--+ +------------------------+
> +---v--------+ ^ +---v--------+
> |GVT Workload|... | |GVT Workload|...
> +------------+ | +------------+
> |
> | Pick Workload from Q
> +--------------------+---------------------------------+
> | GVT Workload Scheduler |
> +--------------------+---------------------------------+
> | * Shadow guest LRC context
> +------v------+ * Shadow guest ring buffer
> | GVT Context | * Scan/Patch guest RB instructions
> +------+------+
> |
> v
> Host i915 GEM Submission
>
This kind of graph should also go to some kerneldoc!
Should the picture be updated to reflect that there is GVT context per
guest context? CC'ing Daniel to comment on.
Regards, Joonas
> v6:
>
> - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris)
>
> v5:
> - Only compile this feature when CONFIG_DRM_I915_GVT is enabled. (Tvrtko)
> - Rebase the code into new repo.
> - Add a comment about the ring buffer size. (Joonas)
>
> v2:
>
> Mostly based on Daniel's idea. Call the refactored core logic of GEM
> context creation service and LRC context creation service to create the GVT
> context.
>
> Signed-off-by: Zhi Wang <zhi.a.wang at intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem_context.c | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index d9d7779..c0259d7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -342,6 +342,38 @@ i915_gem_create_context(struct drm_device *dev,
> return ctx;
> }
>
> +/**
> + * i915_gem_create_gvt_context - create a GVT GEM context
> + * @dev: drm device *
> + *
> + * This function is used to create a GVT specific GEM context.
> + *
> + * Returns:
> + * pointer to i915_gem_context on success, error pointer if failed
> + *
> + */
> +struct i915_gem_context *
> +i915_gem_create_gvt_context(struct drm_device *dev)
> +{
> + struct i915_gem_context *ctx;
> +
> + if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
> + return ERR_PTR(-ENODEV);
> +
> + mutex_lock(&dev->struct_mutex);
> +
> + ctx = i915_gem_create_context(dev, NULL);
> + if (IS_ERR(ctx))
> + goto out;
> +
> + ctx->enable_lrc_status_change_notification = true;
> + ctx->enable_lrc_single_submission = true;
> + ctx->lrc_ring_buffer_size = 512 * PAGE_SIZE; /* Max ring buffer size */
> +out:
> + mutex_unlock(&dev->struct_mutex);
> + return ctx;
> +}
> +
> static void i915_gem_context_unpin(struct i915_gem_context *ctx,
> struct intel_engine_cs *engine)
> {
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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