[Intel-gfx] [PATCH 26/62] drm/i915: Rename request->ring to request->engine
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Mon Jun 6 13:42:34 UTC 2016
On 03/06/16 17:36, Chris Wilson wrote:
> In order to disambiguate between the pointer to the intel_engine_cs
> (called ring) and the intel_ringbuffer (called ringbuf), rename
> s/ring/engine/.
This patch looks like residual rebase noise so I think you should just
drop it.
Regards,
Tvrtko
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 3 +--
> drivers/gpu/drm/i915/i915_gem.c | 6 ++----
> drivers/gpu/drm/i915/i915_gem_context.c | 6 ++----
> drivers/gpu/drm/i915/i915_gem_gtt.c | 5 ++---
> drivers/gpu/drm/i915/i915_gem_render_state.c | 12 ++++++------
> drivers/gpu/drm/i915/i915_gem_request.c | 6 +-----
> drivers/gpu/drm/i915/i915_gpu_error.c | 3 +--
> drivers/gpu/drm/i915/i915_guc_submission.c | 4 ++--
> drivers/gpu/drm/i915/intel_lrc.c | 6 +++---
> 9 files changed, 20 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index c1f8b5126d16..34e41ae2943e 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -193,8 +193,7 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
> seq_printf(m, " (%s mappable)", s);
> }
> if (obj->last_write_req != NULL)
> - seq_printf(m, " (%s)",
> - i915_gem_request_get_engine(obj->last_write_req)->name);
> + seq_printf(m, " (%s)", obj->last_write_req->engine->name);
> if (obj->frontbuffer_bits)
> seq_printf(m, " (frontbuffer: 0x%03x)", obj->frontbuffer_bits);
> }
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 22c8361748d6..8edd79ad08b4 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2101,9 +2101,7 @@ void i915_vma_move_to_active(struct i915_vma *vma,
> struct drm_i915_gem_request *req)
> {
> struct drm_i915_gem_object *obj = vma->obj;
> - struct intel_engine_cs *engine;
> -
> - engine = i915_gem_request_get_engine(req);
> + struct intel_engine_cs *engine = req->engine;
>
> /* Add a reference if we're newly entering the active list. */
> if (obj->active == 0)
> @@ -2561,7 +2559,7 @@ __i915_gem_object_sync(struct drm_i915_gem_object *obj,
> struct intel_engine_cs *from;
> int ret;
>
> - from = i915_gem_request_get_engine(from_req);
> + from = from_req->engine;
> if (to == from)
> return 0;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 41e32426d174..899731f9a2c4 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -555,8 +555,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
> if (num_rings) {
> struct intel_engine_cs *signaller;
>
> - intel_ring_emit(ring,
> - MI_LOAD_REGISTER_IMM(num_rings));
> + intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings));
> for_each_engine(signaller, dev_priv) {
> if (signaller == req->engine)
> continue;
> @@ -585,8 +584,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
> struct intel_engine_cs *signaller;
> i915_reg_t last_reg = {}; /* keep gcc quiet */
>
> - intel_ring_emit(ring,
> - MI_LOAD_REGISTER_IMM(num_rings));
> + intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings));
> for_each_engine(signaller, dev_priv) {
> if (signaller == req->engine)
> continue;
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f735d1ec189a..4b4e3de58ad9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1689,7 +1689,7 @@ static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
> struct drm_i915_gem_request *req)
> {
> struct intel_engine_cs *engine = req->engine;
> - struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev);
> + struct drm_i915_private *dev_priv = req->i915;
>
> I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G);
> I915_WRITE(RING_PP_DIR_BASE(engine), get_pd_offset(ppgtt));
> @@ -1737,8 +1737,7 @@ static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
> struct drm_i915_gem_request *req)
> {
> struct intel_engine_cs *engine = req->engine;
> - struct drm_device *dev = ppgtt->base.dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> + struct drm_i915_private *dev_priv = req->i915;
>
>
> I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G);
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index 99eff898b4cb..41eb9a91bfee 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -207,17 +207,17 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
> return 0;
>
> ret = req->engine->dispatch_execbuffer(req, so.ggtt_offset,
> - so.rodata->batch_items * 4,
> - I915_DISPATCH_SECURE);
> + so.rodata->batch_items * 4,
> + I915_DISPATCH_SECURE);
> if (ret)
> goto out;
>
> if (so.aux_batch_size > 8) {
> ret = req->engine->dispatch_execbuffer(req,
> - (so.ggtt_offset +
> - so.aux_batch_offset),
> - so.aux_batch_size,
> - I915_DISPATCH_SECURE);
> + (so.ggtt_offset +
> + so.aux_batch_offset),
> + so.aux_batch_size,
> + I915_DISPATCH_SECURE);
> if (ret)
> goto out;
> }
> diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
> index ba745f0740d0..059ba88e182e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_request.c
> +++ b/drivers/gpu/drm/i915/i915_gem_request.c
> @@ -299,7 +299,6 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
> int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
> struct drm_file *file)
> {
> - struct drm_i915_private *dev_private;
> struct drm_i915_file_private *file_priv;
>
> WARN_ON(!req || !file || req->file_priv);
> @@ -310,7 +309,6 @@ int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
> if (req->file_priv)
> return -EINVAL;
>
> - dev_private = req->i915;
> file_priv = file->driver_priv;
>
> spin_lock(&file_priv->mm.lock);
> @@ -417,7 +415,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
> bool flush_caches)
> {
> struct intel_engine_cs *engine;
> - struct drm_i915_private *dev_priv;
> struct intel_ringbuffer *ringbuf;
> u32 request_start;
> u32 reserved_tail;
> @@ -427,7 +424,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
> return;
>
> engine = request->engine;
> - dev_priv = request->i915;
> ringbuf = request->ringbuf;
>
> /*
> @@ -502,7 +498,7 @@ void __i915_add_request(struct drm_i915_gem_request *request,
> "for adding the request (%d bytes)\n",
> reserved_tail, ret);
>
> - i915_gem_mark_busy(dev_priv, engine);
> + i915_gem_mark_busy(request->i915, engine);
> }
>
> static unsigned long local_clock_us(unsigned *cpu)
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index a8082b8a9797..d1667aa640ef 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -762,8 +762,7 @@ static void capture_bo(struct drm_i915_error_buffer *err,
> err->dirty = obj->dirty;
> err->purgeable = obj->madv != I915_MADV_WILLNEED;
> err->userptr = obj->userptr.mm != NULL;
> - err->ring = obj->last_write_req ?
> - i915_gem_request_get_engine(obj->last_write_req)->id : -1;
> + err->ring = obj->last_write_req ? obj->last_write_req->engine->id : -1;
> err->cache_level = obj->cache_level;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 4cec580784ea..337b8f60989c 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -534,8 +534,8 @@ static void guc_add_workqueue_item(struct i915_guc_client *gc,
> WQ_NO_WCFLUSH_WAIT;
>
> /* The GuC wants only the low-order word of the context descriptor */
> - wqi->context_desc = (u32)intel_lr_context_descriptor(rq->ctx,
> - rq->engine);
> + wqi->context_desc =
> + (u32)intel_lr_context_descriptor(rq->ctx, rq->engine);
>
> wqi->ring_tail = tail << WQ_RING_TAIL_SHIFT;
> wqi->fence_id = rq->fence.seqno;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 3076b63f2298..a1820d531e49 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1776,13 +1776,13 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
> return 0;
>
> ret = req->engine->emit_bb_start(req, so.ggtt_offset,
> - I915_DISPATCH_SECURE);
> + I915_DISPATCH_SECURE);
> if (ret)
> goto out;
>
> ret = req->engine->emit_bb_start(req,
> - (so.ggtt_offset + so.aux_batch_offset),
> - I915_DISPATCH_SECURE);
> + (so.ggtt_offset + so.aux_batch_offset),
> + I915_DISPATCH_SECURE);
> if (ret)
> goto out;
>
>
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