[Intel-gfx] [PATCH 13/21] drm/i915: Check the CPU cached value of seqno after waking the waiter

[Tvrtko Ursulin]

On 03/06/16 17:08, Chris Wilson wrote:
> If we have multiple waiters, we may find that many complete on the same
> wake up. If we first inspect the seqno from the CPU cache, we may reduce
> the number of heavyweight coherent seqno reads we require.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++----
>   1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4a71f4e9a97a..4ddb9ff319cb 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3918,6 +3918,12 @@ static inline bool __i915_request_irq_complete(struct drm_i915_gem_request *req)
>   {
>   	struct intel_engine_cs *engine = req->engine;
>
> +	/* Before we do the heavier coherent read of the seqno,
> +	 * check the value (hopefully) in the CPU cacheline.
> +	 */
> +	if (i915_gem_request_completed(req))
> +		return true;
> +
>   	/* Ensure our read of the seqno is coherent so that we
>   	 * do not "miss an interrupt" (i.e. if this is the last
>   	 * request and the seqno write from the GPU is not visible
> @@ -3929,11 +3935,11 @@ static inline bool __i915_request_irq_complete(struct drm_i915_gem_request *req)
>   	 * but it is easier and safer to do it every time the waiter
>   	 * is woken.
>   	 */
> -	if (engine->irq_seqno_barrier)
> +	if (engine->irq_seqno_barrier) {
>   		engine->irq_seqno_barrier(engine);
> -
> -	if (i915_gem_request_completed(req))
> -		return true;
> +		if (i915_gem_request_completed(req))
> +			return true;
> +	}
>
>   	/* We need to check whether any gpu reset happened in between
>   	 * the request being submitted and now. If a reset has occurred,
>

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko