[Intel-gfx] [PATCH v8 07/10] drm/i915: Make addressing mode bits in context descriptor configurable

Wang, Zhi A zhi.a.wang at intel.com
Wed Jun 8 16:13:35 UTC 2016


Sure. Will improve that in v9.

> -----Original Message-----
> From: Chris Wilson [mailto:chris at chris-wilson.co.uk]
> Sent: Wednesday, June 08, 2016 7:09 PM
> To: Wang, Zhi A <zhi.a.wang at intel.com>
> Cc: Lv, Zhiyuan <zhiyuan.lv at intel.com>; Tian, Kevin <kevin.tian at intel.com>;
> tvrtko.ursulin at linux.intel.com; intel-gfx at lists.freedesktop.org
> Subject: Re: [PATCH v8 07/10] drm/i915: Make addressing mode bits in context
> descriptor configurable
> 
> On Wed, Jun 08, 2016 at 11:30:25AM -0400, Zhi Wang wrote:
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h index 66fdb8d..6a79c8c 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -879,6 +879,7 @@ struct i915_gem_context {
> >  		bool initialised;
> >  	} engine[I915_NUM_ENGINES];
> >  	u32 ring_size;
> > +	u32 addressing_mode;
> >
> >  	struct list_head link;
> >
> > @@ -326,6 +314,7 @@ intel_lr_context_descriptor_update(struct
> i915_gem_context *ctx,
> >  	BUILD_BUG_ON(MAX_CONTEXT_HW_ID > (1<<GEN8_CTX_ID_WIDTH));
> >
> >  	desc = engine->ctx_desc_template;			/* bits  0-11 */
> > +	desc |= ctx->addressing_mode;				/* bits  3-4  */
> 
> Did we not think that
> 
> 	desc = ctx->desc_template;
> 	desc |= engine->ctx_desc_template;
> 
> worked slightly better?
> 
> >  	desc |= ce->lrc_vma->node.start + LRC_PPHWSP_PN * PAGE_SIZE;
> >  								/* bits 12-31 */
> >  	desc |= (u64)ctx->hw_id << GEN8_CTX_ID_SHIFT;		/* bits 32-52
> */
> 
> --
> Chris Wilson, Intel Open Source Technology Centre


More information about the Intel-gfx mailing list