[Intel-gfx] [PATCH] drm/i915/skl: Increase cursor ddb blocks in multi-pipe config

[Rodrigo Vivi]

I believe we should use whatever BSpec recommends.

If that is not the best behavior and block things out than the spec
needs to be updated or a workaround documented there.

Art? thoughts?

On Mon, Jun 13, 2016 at 3:03 PM, Radhakrishna Sripada
<radhakrishna.sripada at intel.com> wrote:
> The bspec suggests giving cursor planes a fixed allocation of 8
> blocks when running in a multi-CRTC configuration.  However we
> have found that this small allocation can only accommodate level
> 0 watermarks on many platforms, which in turn prevents the
> system from entering deeper sleep states.  Let's use a slightly
> higher allocation of 16 blocks for the cursor to increase our
> chances of enabling lower power states.
>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 658a756..a949dac 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2933,7 +2933,8 @@ static unsigned int skl_cursor_allocation(int num_active)
>         if (num_active == 1)
>                 return 32;
>
> -       return 8;
> +       /* higher than bspec recommendation (8) */
> +       return 16;
>  }
>
>  static void skl_ddb_entry_init_from_hw(struct skl_ddb_entry *entry, u32 reg)
> --
> 1.9.1
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br