[Intel-gfx] [PATCH v2 13/15] drm/i915/tdr: Export reset count info to debugfs

Chris Wilson chris at chris-wilson.co.uk
Fri Jun 17 07:21:50 UTC 2016


On Fri, Jun 17, 2016 at 08:09:13AM +0100, Arun Siluvery wrote:
> A new variable is added to export the reset counts to debugfs, this
> includes full gpu reset and engine reset count. This is useful for tests
> where they areexpected to trigger reset; these counts are checked before
> and after the test to ensure the same.
> 
> Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 33 +++++++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 5b75266..b02ca7a 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -4814,6 +4814,38 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
>  			i915_wedged_get, i915_wedged_set,
>  			"%llu\n");
>  
> +
> +static ssize_t i915_reset_info_read(struct file *filp, char __user *ubuf,
> +				    size_t max, loff_t *ppos)
> +{
> +	int len;
> +	char buf[300];
> +	struct drm_device *dev = filp->private_data;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct i915_gpu_error *error = &dev_priv->gpu_error;
> +	struct intel_engine_cs *engine;
> +
> +	len = scnprintf(buf, sizeof(buf), "full gpu reset = %u\n",
> +			i915_reset_count(error));
> +
> +	for_each_engine(engine, dev_priv) {
> +		len += scnprintf(buf + len, sizeof(buf) - len,
> +				 "%s = %u\n", engine->name,
> +				 i915_engine_reset_count(error, engine));
> +	}
> +
> +	len += scnprintf(buf + len - 1, sizeof(buf) - len, "\n");
> +
> +	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
> +}
> +
> +static const struct file_operations i915_reset_info_fops = {
> +	.owner = THIS_MODULE,
> +	.open = simple_open,
> +	.read = i915_reset_info_read,
> +	.llseek = default_llseek,
> +};

Why not a simple seq file? Why not extend hangcheck info?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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