[Intel-gfx] drm/i915 4.5/4.6 stable backport request for CHV
Daniel Vetter
daniel at ffwll.ch
Wed Jun 22 13:55:03 UTC 2016
On Mon, Jun 6, 2016 at 11:32 AM, Ville Syrjälä
<ville.syrjala at linux.intel.com> wrote:
> On Sat, Jun 04, 2016 at 02:06:58PM -0700, Greg KH wrote:
>> On Fri, May 27, 2016 at 11:30:30AM +0300, ville.syrjala at linux.intel.com wrote:
>> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> >
>> > Several nasty i915 regressions affecting CHV slipped through
>> > to 4.5 and 4.6.
>> >
>> > The first fix we want in 4.5 and 4.6 is
>> > commit caed361d83b2 ("drm/i915: Fix watermarks for VLV/CHV")
>> > It won't cherry-pick cleanly to either one, so I've included conflict
>> > free versions for both. This one fixes display FIFO underruns that can
>> > lead to the screen totally blanking out.
>>
>> Now applied, thanks.
>>
>> > The other one I'd like to have in 4.6 is
>> > commit 9f6151c90390 ("drm/i915: Pass the correct crtc state to .update_plane()")
>> > which avoids a totally corrupted display in some cases.
>>
>> Now applied.
>>
>> > And the third on is a bit more annoying. The regression is caused by
>> > commit 9dbaab56ac09 ("drm/i915: Exit cherryview_irq_handler() after one pass")
>> > which I though we had prevented from getting out on its own, but turns
>> > out I was wrong. It basically makes the GPU unusable, so we do need to
>> > fix it somehow. The simple solution would be to revert it in 4.6 only.
>> > The more complicated solution is to backport the proper fix, which more
>> > or less requires the following set of commits [1], which is maybe a bit
>> > too much for stable. I could try to trim it a bit perhaps, but then we
>> > start to enter the territory of untested code which I don't particularly
>> > like. Let me know what you think.
>> >
>> > [1]
>> > 1e1cace942ef ("drm/i915: Eliminate loop from VLV irq handler")
>> > a5e485a95c9c ("drm/i915: Clear VLV_IER around irq processing")
>> > 4a0a0202b023 ("drm/i915: Clear VLV_MASTER_IER around irq processing")
>> > 7ce4d1f2730f ("drm/i915: Clear VLV_IIR after PIPESTAT")
>> > 34c7b8a7b8b5 ("drm/i915: Set up VLV_MASTER_IER consistently")
>> > e5328c43d46e ("drm/i915: Use GEN8_MASTER_IRQ_CONTROL consistently")
>> > 71b8b41d5b35 ("drm/i915: Move DPINVGTT setup to vlv_display_irq_reset()")
>> > 6b7eafc1b43d ("drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh display irq postinstall")
>> > 9ab981f22bef ("drm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()")
>> > d6c698035892 ("drm/i915: Clear display interrupt before enabling when turning on the power well")
>> > 8bb613068a63 ("drm/i915: Move vlv/chv display irq code to a more logical place")
>> > 9918271efc7a ("drm/i915: Skip display irq setup if display irqs aren't flagged as enabled")
>> > ad22d10654ea ("drm/i915: Fix up vlv/chv display irq setup")
>> > 93de68f94081 ("drm/i915: Remove "VLV magic" from irq setup")
>>
>> I think reverting that one patch for 4.6 makes more sense than adding
>> all of these patches. I'll do that if you want me to.
>
> That works for me. Thanks.
Has this happened? I just got a ping on irc that braswell in 4.6 is
still entirely toasted :(
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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