[Intel-gfx] [PATCH 3/4] drm/i915: Introduce client-managed fence register.

Zhi Wang zhi.a.wang at intel.com
Tue Jun 28 13:51:44 UTC 2016


This patche enables a client to request fence register from i915 and
manage it by itself.

A client should:

- Set the client_managed flag and clear the HW fence register after
acquiring a fence reg from i915

- Clear the HW fence register and return it to i915 by clearing
client_managed flag

- Save/restore the acquired fence registers during S3 by itself.

Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Zhi Wang <zhi.a.wang at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2d88e7e..68cd453 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -457,11 +457,13 @@ struct drm_i915_fence_reg {
 	struct list_head lru_list;
 	struct drm_i915_gem_object *obj;
 	int pin_count;
+	bool client_managed;
 };
 
 #define for_each_fence_reg(dev_priv, reg, index) \
 	for ((index) = 0, (reg) = &dev_priv->fence_regs[index]; \
-	     (index) < dev_priv->num_fence_regs; (index)++, (reg)++)
+	     (index) < dev_priv->num_fence_regs; (index)++, (reg)++) \
+		for_each_if (!reg->client_managed)
 
 struct sdvo_device_mapping {
 	u8 initialized;
-- 
1.9.1



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