[Intel-gfx] [PATCH i-g-t 1/2] lib/intel_chipset: Add more Kabylake PCI IDs.

[Pandiyan, Dhinakaran]

On Mon, 2016-06-27 at 17:11 -0700, Rodrigo Vivi wrote:
> The spec has been updated adding new PCI IDs.
> 
> v2: Avoid using "H" instead of HALO to keep names uniform - DK.
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  lib/intel_chipset.h | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index 2f2e435..23d0919 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -213,7 +213,9 @@ void intel_check_pch(void);
>  #define PCI_CHIP_KABYLAKE_ULT_GT2      0x5916
>  #define PCI_CHIP_KABYLAKE_ULT_GT1_5    0x5913
>  #define PCI_CHIP_KABYLAKE_ULT_GT1      0x5906
> -#define PCI_CHIP_KABYLAKE_ULT_GT3      0x5926
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_0    0x5923
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_1    0x5926
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_2    0x5927
>  #define PCI_CHIP_KABYLAKE_ULT_GT2F     0x5921
>  #define PCI_CHIP_KABYLAKE_ULX_GT1_5    0x5915
>  #define PCI_CHIP_KABYLAKE_ULX_GT1      0x590E
> @@ -224,7 +226,8 @@ void intel_check_pch(void);
>  #define PCI_CHIP_KABYLAKE_DT_GT4       0x5932
>  #define PCI_CHIP_KABYLAKE_HALO_GT2     0x591B
>  #define PCI_CHIP_KABYLAKE_HALO_GT3     0x592B
> -#define PCI_CHIP_KABYLAKE_HALO_GT1     0x590B
> +#define PCI_CHIP_KABYLAKE_HALO_GT1_0   0x5908
> +#define PCI_CHIP_KABYLAKE_HALO_GT1_1   0x590B
>  #define PCI_CHIP_KABYLAKE_HALO_GT4     0x593B
>  #define PCI_CHIP_KABYLAKE_SRV_GT2      0x591A
>  #define PCI_CHIP_KABYLAKE_SRV_GT3      0x592A
> @@ -430,7 +433,8 @@ void intel_check_pch(void);
>  				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1||	\
> -				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
>  
>  #define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2|| \
> @@ -441,7 +445,9 @@ void intel_check_pch(void);
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
>  
> -#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3|| \
> +#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
>  
Looks good.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>